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kernel-2.6.18-238.el5.src.rpm

From: John Villalovos <jvillalo@redhat.com>
Date: Mon, 21 Jun 2010 18:31:30 -0400
Subject: [misc] intel: support for Intel Cougar Point Chipset
Message-id: <20100621183130.GA22925@linuxjohn.usersys.redhat.com>
Patchwork-id: 26365
O-Subject: [RHEL5.6 PATCH] BZ566854 Support for Intel Cougar Point Chipset
Bugzilla: 566854
RH-Acked-by: Rik van Riel <riel@redhat.com>
RH-Acked-by: Prarit Bhargava <prarit@redhat.com>

[RHEL5.6 PATCH] Support for Intel Cougar Point Chipset
https://bugzilla.redhat.com/show_bug.cgi?id=566854

This is a backport of ten commits to add support for the Cougar Point
chipset to RHEL 5.6.  Cougar Point is the chipset used in Intel's next
generation mobile (laptop), desktop, and entry level server products.

Brew Build:
https://brewweb.devel.redhat.com/taskinfo?taskID=2519100

RHTS Tests:
I believe the errors in the RHTS test passes are unrelated to my patch.
https://rhts.redhat.com/cgi-bin/rhts/jobs.cgi?id=163452
https://rhts.redhat.com/cgi-bin/rhts/jobs.cgi?id=163601
https://rhts.redhat.com/cgi-bin/rhts/jobs.cgi?id=163602

System testing:
I installed the kernel on a Cougar Point desktop system and all my testing was
successful.

Backport of the following commits:

Upstream commit 250d1bd3f4ed0b50d79b3ec81ccefbabb203f916
Upstream Author: Jean Delvare <khali@linux-fr.org>
Upstream Date:   Sun Dec 10 21:21:33 2006 +0100

    i2c: Enable PEC on more i2c-i801 devices

    Enable PEC on recent Intel SMBus controllers (ICH6, ICH7, ICH8, ICH9
    and ESB2.)

    Signed-off-by: Jean Delvare <khali@linux-fr.org>
    Acked-by: Jason Gaston <jason.d.gaston@intel.com>

Upstream commit ae7b0497b8280ad5ecfe7bd045c5106f35950c8a
Upstream Author: Jean Delvare <khali@linux-fr.org>
Upstream Date:   Sun Jan 27 18:14:49 2008 +0100

    i2c-i801: Document which chip support what feature

    Provide a clearer documentation of which additional features each
    ICH chip support, and which of these the driver supports.

    Signed-off-by: Jean Delvare <khali@linux-fr.org>

Upstream commit 93da6202264ce1256b04db8008a43882ae62d060
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Tue Jan 12 16:56:37 2010 -0800

    x86/PCI: irq and pci_ids patch for Intel Cougar Point DeviceIDs

    This patch adds the Intel Cougar Point (PCH) LPC and SMBus Controller DeviceIDs.

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Upstream commit 5623cab83ea61e0420f2064216d83eab067a24c6
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Tue Jan 12 17:00:18 2010 -0800

    ahci: AHCI and RAID mode SATA patch for Intel Cougar Point DeviceIDs

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

Upstream commit 88e8201e67aace3d86de9e75122ea525f0e7248e
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Tue Jan 12 17:01:28 2010 -0800

    ata_piix: IDE Mode SATA patch for Intel Cougar Point DeviceIDs

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

Upstream commit d2f2fcd2541bae004db7f4798ffd9d2cb75ae817
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Tue Jan 12 17:03:35 2010 -0800

    ALSA: hda_intel: ALSA HD Audio patch for Intel Cougar Point DeviceIDs

    This patch adds the Intel Cougar Point (PCH) HD Audio Controller DeviceIDs.

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Takashi Iwai <tiwai@suse.de>

Upstream commit 32679f95cac3b1bdf27dce8b5273e06af186fd91
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Mon Feb 22 17:31:09 2010 -0800

    ALSA: hda - enable snoop for Intel Cougar Point

    This patch enables snoop, eliminating static during playback.
    This patch supersedes the previous Cougar Point audio patch.

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Takashi Iwai <tiwai@suse.de>

Upstream commit 393764340beb595c1ad7dd2d2243c2b6551aaa71
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Tue Mar 2 12:23:39 2010 +0100

    i2c-i801: Add Intel Cougar Point device IDs

    Add the Intel Cougar Point (PCH) SMBus controller device IDs.

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Jean Delvare <khali@linux-fr.org>

Upstream commit 33852cb03ee4cdb05dc6e3a21ec19a4ee63511a4
Upstream Author: Seth Heasley <seth.heasley@intel.com>
Upstream Date:   Thu Mar 25 16:11:37 2010 -0700

    x86/PCI: irq and pci_ids patch for additional Intel Cougar Point DeviceIDs

    This patch adds additional LPC Controller DeviceIDs for the Intel Cougar
    Point PCH.

    The DeviceIDs are defined and referenced as a range of values, the same
    way Ibex Peak was implemented.

    Signed-off-by: Seth Heasley <seth.heasley@intel.com>
    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Upstream commit e0e8398c7a40f1fb65cefa9d35ed6cd84cee6008
Upstream Author: Jean Delvare <khali@linux-fr.org>
Upstream Date:   Fri May 21 18:40:55 2010 +0200

    i2c-i801: All newer devices have all the optional features

    Only the oldest devices lack some of the features supported by this
    driver. List them explicitly, and default to all features enabled for
    all other chips, including the ones added through sysfs. This will
    make future driver maintenance easier.

    In the unlikely event of a not yet supported device not implementing
    all the features, one can always use the disable_features module
    parameter to prevent the driver from attempting to use them.

    Signed-off-by: Jean Delvare <khali@linux-fr.org>
    Acked-by: Seth Heasley <seth.heasley@intel.com>

Signed-off-by: Jarod Wilson <jarod@redhat.com>

diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801
index 72ed6b9..a534f5b 100644
--- a/Documentation/i2c/busses/i2c-i801
+++ b/Documentation/i2c/busses/i2c-i801
@@ -14,8 +14,9 @@ Supported adapters:
   * Intel 82801I (ICH9)
   * Intel EP80579 (Tolapai)
   * Intel 82801JI (ICH10)
-  * Intel PCH
-    Datasheets: Publicly available at the Intel website
+  * Intel 3400/5 Series (PCH)
+  * Intel Cougar Point (PCH)
+   Datasheets: Publicly available at the Intel website
 
 Authors: 
 	Frodo Looijaard <frodol@dds.nl>, 
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index d6f81e4..e6ee7a1 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -569,6 +569,13 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
 		return 1;
 	}
 
+	if ((device >= PCI_DEVICE_ID_INTEL_CPT_LPC_MIN) && 
+		(device <= PCI_DEVICE_ID_INTEL_CPT_LPC_MAX)) {
+		r->name = "PIIX/ICH";
+		r->get = pirq_piix_get;
+		r->set = pirq_piix_set;
+		return 1;
+	}
 	return 0;
 }
 
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index dcb0ea9..91687f5 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -508,6 +508,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
 	{ PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
 	{ PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c03), board_ahci }, /* CPT AHCI */
+	{ PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c05), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */
+	{ PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */
 
 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index ff18ba4..724a082 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -286,7 +286,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
 	{ 0x8086, 0x3b2d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
 	/* SATA Controller IDE (PCH) */
 	{ 0x8086, 0x3b2e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
-
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
+	/* SATA Controller IDE (CPT) */
+	{ 0x8086, 0x1c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
 	{ }	/* terminate list */
 };
 
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 55e3c43..4b0a647 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -108,7 +108,7 @@ config I2C_HYDRA
 	  will be called i2c-hydra.
 
 config I2C_I801
-	tristate "Intel 82801 (ICH)"
+	tristate "Intel 82801 (ICH/PCH)"
 	depends on I2C && PCI
 	help
 	  If you say yes to this option, support will be included for the Intel
@@ -128,7 +128,8 @@ config I2C_I801
 	    ICH9
 	    Tolapai
 	    ICH10
-	    PCH
+	    3400/5 Series (PCH)
+	    Cougar Point (PCH)
 
 	  This driver can also be built as a module.  If so, the module
 	  will be called i2c-i801.
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index f27c9f9..620be06 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -21,29 +21,38 @@
 */
 
 /*
-    SUPPORTED DEVICES	PCI ID
-    82801AA		2413           
-    82801AB		2423           
-    82801BA		2443           
-    82801CA/CAM		2483           
-    82801DB		24C3   (HW PEC supported, 32 byte buffer not supported)
-    82801EB		24D3   (HW PEC supported, 32 byte buffer not supported)
-    6300ESB		25A4
-    ICH6		266A
-    ICH7		27DA
-    ESB2		269B
-    ICH8		283E
-    ICH9		2930
-    Tolapai		5032
-    ICH10		3A30
-    ICH10		3A60
-    PCH                 3B30
-
-    This driver supports several versions of Intel's I/O Controller Hubs (ICH).
-    For SMBus support, they are similar to the PIIX4 and are part
-    of Intel's '810' and other chipsets.
-    See the file Documentation/i2c/busses/i2c-i801 for details.
-    I2C Block Read and Process Call are not supported.
+  Supports the following Intel I/O Controller Hubs (ICH):
+
+                                  I/O                     Block   I2C
+                                  region  SMBus   Block   proc.   block
+  Chip name             PCI ID    size    PEC     buffer  call    read
+  ----------------------------------------------------------------------
+  82801AA  (ICH)        0x2413     16      no      no      no      no
+  82801AB  (ICH0)       0x2423     16      no      no      no      no
+  82801BA  (ICH2)       0x2443     16      no      no      no      no
+  82801CA  (ICH3)       0x2483     32     soft     no      no      no
+  82801DB  (ICH4)       0x24c3     32     hard     yes     no      no
+  82801E   (ICH5)       0x24d3     32     hard     yes     yes     yes
+  6300ESB               0x25a4     32     hard     yes     yes     yes
+  82801F   (ICH6)       0x266a     32     hard     yes     yes     yes
+  6310ESB/6320ESB       0x269b     32     hard     yes     yes     yes
+  82801G   (ICH7)       0x27da     32     hard     yes     yes     yes
+  82801H   (ICH8)       0x283e     32     hard     yes     yes     yes
+  82801I   (ICH9)       0x2930     32     hard     yes     yes     yes
+  Tolapai               0x5032     32     hard     yes     ?       ?
+  ICH10                 0x3a30     32     hard     yes     yes     yes
+  ICH10                 0x3a60     32     hard     yes     yes     yes
+  3400/5 Series (PCH)   0x3b30     32     hard     yes     yes     yes
+  Cougar Point (PCH)    0x1c22     32     hard     yes     yes     yes
+
+  Features supported by this driver:
+  Software PEC                     no
+  Hardware PEC                     yes
+  Block buffer                     yes
+  Block process call transaction   no
+  I2C block read transaction       no
+
+  See the file Documentation/i2c/busses/i2c-i801 for details.
 */
 
 /* Note: we assume there can only be one I801, with one SMBus interface */
@@ -67,9 +76,9 @@
 #define SMBHSTDAT0	(5 + i801_smba)
 #define SMBHSTDAT1	(6 + i801_smba)
 #define SMBBLKDAT	(7 + i801_smba)
-#define SMBPEC		(8 + i801_smba)	/* ICH4 only */
-#define SMBAUXSTS	(12 + i801_smba)	/* ICH4 only */
-#define SMBAUXCTL	(13 + i801_smba)	/* ICH4 only */
+#define SMBPEC		(8 + i801_smba)		/* ICH3 and later */
+#define SMBAUXSTS	(12 + i801_smba)	/* ICH4 and later */
+#define SMBAUXCTL	(13 + i801_smba)	/* ICH4 and later */
 
 /* PCI Address Constants */
 #define SMBBAR		4
@@ -89,13 +98,13 @@
 #define I801_BYTE		0x04
 #define I801_BYTE_DATA		0x08
 #define I801_WORD_DATA		0x0C
-#define I801_PROC_CALL		0x10	/* later chips only, unimplemented */
+#define I801_PROC_CALL		0x10	/* unimplemented */
 #define I801_BLOCK_DATA		0x14
 #define I801_I2C_BLOCK_DATA	0x18	/* unimplemented */
 #define I801_BLOCK_LAST		0x34
 #define I801_I2C_BLOCK_LAST	0x38	/* unimplemented */
 #define I801_START		0x40
-#define I801_PEC_EN		0x80	/* ICH4 only */
+#define I801_PEC_EN		0x80	/* ICH3 and later */
 
 
 static int i801_transaction(void);
@@ -468,6 +477,7 @@ static struct pci_device_id i801_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_4) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH10_5) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PCH_SMBUS) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_CPT_SMBUS) },
 	{ 0, }
 };
 
@@ -479,13 +489,17 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
 	int err;
 
 	I801_dev = dev;
-	if ((dev->device == PCI_DEVICE_ID_INTEL_82801DB_3) ||
-	    (dev->device == PCI_DEVICE_ID_INTEL_82801EB_3) ||
-	    (dev->device == PCI_DEVICE_ID_INTEL_ESB_4)     ||
-	    (dev->device == PCI_DEVICE_ID_INTEL_TOLAPAI_1))
+	switch (dev->device) {
+	default:
 		isich4 = 1;
-	else
+		break;
+	case PCI_DEVICE_ID_INTEL_82801CA_3:
+	case PCI_DEVICE_ID_INTEL_82801BA_2:
+	case PCI_DEVICE_ID_INTEL_82801AB_3:
+	case PCI_DEVICE_ID_INTEL_82801AA_3:
 		isich4 = 0;
+		break;
+	}
 
 	err = pci_enable_device(dev);
 	if (err) {
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 0854c2c..ffb1323 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2207,6 +2207,9 @@
 #define PCI_DEVICE_ID_INTEL_82840_HB	0x1a21
 #define PCI_DEVICE_ID_INTEL_82845_HB	0x1a30
 #define PCI_DEVICE_ID_INTEL_IOAT	0x1a38
+#define PCI_DEVICE_ID_INTEL_CPT_SMBUS	0x1c22
+#define PCI_DEVICE_ID_INTEL_CPT_LPC_MIN	0x1c41
+#define PCI_DEVICE_ID_INTEL_CPT_LPC_MAX	0x1c5f
 #define PCI_DEVICE_ID_INTEL_82801AA_0	0x2410
 #define PCI_DEVICE_ID_INTEL_82801AA_1	0x2411
 #define PCI_DEVICE_ID_INTEL_82801AA_3	0x2413
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 901b5ad..bb839b1 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -118,6 +118,7 @@ MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 			 "{Intel, ICH9},"
 			 "{Intel, ICH10},"
 			 "{Intel, PCH},"
+			 "{Intel, CPT},"
 			 "{Intel, SCH},"
 			 "{ATI, SB450},"
 			 "{ATI, SB600},"
@@ -439,6 +440,7 @@ struct azx {
 /* driver types */
 enum {
 	AZX_DRIVER_ICH,
+	AZX_DRIVER_PCH,
 	AZX_DRIVER_SCH,
 	AZX_DRIVER_ATI,
 	AZX_DRIVER_ATIHDMI,
@@ -453,6 +455,7 @@ enum {
 
 static char *driver_short_names[] __devinitdata = {
 	[AZX_DRIVER_ICH] = "HDA Intel",
+	[AZX_DRIVER_PCH] = "HDA Intel PCH",
 	[AZX_DRIVER_SCH] = "HDA Intel MID",
 	[AZX_DRIVER_ATI] = "HDA ATI SB",
 	[AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
@@ -1037,6 +1040,7 @@ static void azx_init_pci(struct azx *chip)
 				0x01, NVIDIA_HDA_ENABLE_COHBIT);
 		break;
 	case AZX_DRIVER_SCH:
+	case AZX_DRIVER_PCH:
 		pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 		if (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) {
 			pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC,
@@ -2383,6 +2387,7 @@ static int __devinit azx_create(struct snd_card *card, struct pci_dev *pci,
 	if (bdl_pos_adj[dev] < 0) {
 		switch (chip->driver_type) {
 		case AZX_DRIVER_ICH:
+		case AZX_DRIVER_PCH:
 			bdl_pos_adj[dev] = 1;
 			break;
 		default:
@@ -2657,6 +2662,8 @@ static struct pci_device_id azx_ids[] = {
 	{ PCI_DEVICE(0x8086, 0x3a6e), .driver_data = AZX_DRIVER_ICH },
 	/* PCH */
 	{ PCI_DEVICE(0x8086, 0x3b56), .driver_data = AZX_DRIVER_ICH },
+	/* CPT */
+	{ PCI_DEVICE(0x8086, 0x1c20), .driver_data = AZX_DRIVER_PCH },
 	/* SCH */
 	{ PCI_DEVICE(0x8086, 0x811b), .driver_data = AZX_DRIVER_SCH },
 	/* ATI SB 450/600 */