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kernel-2.6.18-194.26.1.el5.src.rpm

From: Eduardo Habkost <ehabkost@redhat.com>
Date: Tue, 7 Jul 2009 18:11:18 -0300
Subject: [x86_64] add EFER_SVME define
Message-id: 1247001082-20497-3-git-send-email-ehabkost@redhat.com
O-Subject: [RHEL-5.4 PATCH 2/6] asm-x86_64/msr.h: add EFER_SVME define (v2)
Bugzilla: 507483

The xen msr.h header is updated just for consistency, to avoid needing #ifdefs
on header files that that use those definitions.

Changelog:
 - v2: update mach-xen header too

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

diff --git a/include/asm-x86_64/mach-xen/asm/msr.h b/include/asm-x86_64/mach-xen/asm/msr.h
index 5a8c074..83c5c91 100644
--- a/include/asm-x86_64/mach-xen/asm/msr.h
+++ b/include/asm-x86_64/mach-xen/asm/msr.h
@@ -166,11 +166,13 @@ static inline unsigned int cpuid_edx(unsigned int op)
 #define _EFER_LME 8  /* Long mode enable */
 #define _EFER_LMA 10 /* Long mode active (read-only) */
 #define _EFER_NX 11  /* No execute enable */
+#define _EFER_SVME 12 /* Enable virtualization */
 
 #define EFER_SCE (1<<_EFER_SCE)
 #define EFER_LME (1<<_EFER_LME)
 #define EFER_LMA (1<<_EFER_LMA)
 #define EFER_NX (1<<_EFER_NX)
+#define EFER_SVME (1<<_EFER_SVME)
 
 /* Intel MSRs. Some also available on other CPUs */
 #define MSR_IA32_TSC		0x10
diff --git a/include/asm-x86_64/msr.h b/include/asm-x86_64/msr.h
index ae36f7e..99d6232 100644
--- a/include/asm-x86_64/msr.h
+++ b/include/asm-x86_64/msr.h
@@ -177,11 +177,13 @@ static inline unsigned int cpuid_edx(unsigned int op)
 #define _EFER_LME 8  /* Long mode enable */
 #define _EFER_LMA 10 /* Long mode active (read-only) */
 #define _EFER_NX 11  /* No execute enable */
+#define _EFER_SVME 12 /* Enable virtualization */
 
 #define EFER_SCE (1<<_EFER_SCE)
 #define EFER_LME (1<<_EFER_LME)
 #define EFER_LMA (1<<_EFER_LMA)
 #define EFER_NX (1<<_EFER_NX)
+#define EFER_SVME (1<<_EFER_SVME)
 
 /* Intel MSRs. Some also available on other CPUs */
 #define MSR_IA32_TSC		0x10