From: Paolo Bonzini <pbonzini@redhat.com>
Date: Wed, 7 Apr 2010 23:24:13 -0400
Subject: [xen] set hypervisor present CPUID bit
Message-id: <1270682653-10367-1-git-send-email-pbonzini@redhat.com>
Patchwork-id: 24041
O-Subject: [RHEL5.5.z/5.6 PATCH] Set "hypervisor present" bit for CPUID leaf
	0x00000001
Bugzilla: 573771
RH-Acked-by: Don Dutile <ddutile@redhat.com>
RH-Acked-by: Christopher Lalancette <clalance@redhat.com>

Bugzilla: 573771

Upstream status: http://xenbits.xensource.com/xen-unstable.hg?rev/18794
        (similar but different)

Brew build: http://brewweb.devel.redhat.com/brew/taskinfo?taskID=2355939

The Microsoft SVVP tests require ECX bit 31 to be set for CPUID leaf
0x00000001 (they call it the "hypervisor present" bit).  The patch
satisfies this requirement for HVM guests.  It cannot be trapped for PV
guests; it doesn't matter anyway for Windows.

Tested by me both manually and with the relevant Windows Logo Kit job.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 arch/x86/hvm/hvm.c           |    3 +++
 arch/x86/traps.c             |    1 +
 include/asm-x86/cpufeature.h |    1 +
 3 files changed, 5 insertions(+), 0 deletions(-)

Signed-off-by: Jarod Wilson <jarod@redhat.com>

diff --git a/arch/x86/hvm/hvm.c b/arch/x86/hvm/hvm.c
index 696d37e..a4c810c 100644
--- a/arch/x86/hvm/hvm.c
+++ b/arch/x86/hvm/hvm.c
@@ -696,6 +696,9 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
 #endif
                 clear_bit(X86_FEATURE_PAE & 31, edx);
             clear_bit(X86_FEATURE_PSE36 & 31, edx);
+
+	    /* "Hypervisor present" bit required for Microsoft SVVP.  */
+	    set_bit (X86_FEATURE_HYPERVISOR & 31, ecx);
         }
         else if ( input == 0x80000001 )
         {
diff --git a/arch/x86/traps.c b/arch/x86/traps.c
index 4afc4a1..a638e70 100644
--- a/arch/x86/traps.c
+++ b/arch/x86/traps.c
@@ -641,6 +641,7 @@ static int emulate_forced_invalid_op(struct cpu_user_regs *regs)
         clear_bit(X86_FEATURE_PDCM % 32, &c);
         clear_bit(X86_FEATURE_DCA % 32, &c);
         clear_bit(X86_FEATURE_XSAVE % 32, &c);
+        set_bit(X86_FEATURE_HYPERVISOR % 32, &c);
         break;
     case 0x80000001:
         /* Modify Feature Information. */
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 847e5b6..d8d2350 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -90,6 +90,7 @@
 #define X86_FEATURE_DCA		(4*32+18) /* Direct Cache Access */
 #define X86_FEATURE_XSAVE	(4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */
 #define X86_FEATURE_OSXSAVE	(4*32+27) /* "" XSAVE enabled in the OS */
+#define X86_FEATURE_HYPERVISOR	(4*32+31) /* Running under some hypervisor */
 
 /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
 #define X86_FEATURE_XSTORE	(5*32+ 2) /* on-CPU RNG present (xstore insn) */