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kernel-2.6.18-194.11.1.el5.src.rpm

From: Brian Maly <bmaly@redhat.com>
Date: Thu, 23 Apr 2009 16:55:00 -0400
Subject: [x86] apic: rollover in calibrate_APIC_clock
Message-id: 49F0D5A4.2050606@redhat.com
O-Subject: [RHEL5.4 PATCH] x86/apic: rollover in calibrate_APIC_clock
Bugzilla: 456938
RH-Acked-by: Prarit Bhargava <prarit@redhat.com>

BZ 456938

This patch is an attempt to reduce the chances of a rollover during
calibrate_APIC_clock. The patch just starts the countdown for APIC clock
from the maximum instead of an arbitrary value as is the case upstream.
Some hardware needs a little more time so as to avoid a rollover, and
the purpose of this patch is to reduce the chances of failure.

Worth mentioning is that this patch does not exactly address the BZ. FSC
was seeing a SMI flood on PRIMERGY RX600S4. This was due to a BIOS bug
which has since been resolved in newer BIOS. Much older BIOS was not
even affected. Just a few BIOS revisions are affected. In this respect,
the initial patch to resolve this issue is no longer a priority, but the
initial patch had this one change which seems to make sense to include
in RHEL5. The initial patch is also not upstream and carries some risk.
Since Ive seen no other SMI flood issues reported I decided it doesnt
make sense to increase risk of regression to fix a non-issue. If anyone
is aware of other SMI flooding issues during APIC clock calibration,
please let me know and I can re-visit this issue. Otherwise Im content
with the patch Im currently posting. If anyone feels differently, please
let me know. Im happy to have more input on the subject and can re-work
the patch if needed.

Brian

diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 9ed9c97..2ffaa50 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -1035,7 +1035,7 @@ static int __init calibrate_APIC_clock(void)
 	 * value into the APIC clock, we just want to get the
 	 * counter running for calibration.
 	 */
-	__setup_APIC_LVTT(1000000000);
+	__setup_APIC_LVTT(0xffffffff);
 
 	/*
 	 * The timer chip counts down to zero. Let's wait
diff --git a/arch/x86_64/kernel/apic.c b/arch/x86_64/kernel/apic.c
index 758fece..343dbbb 100644
--- a/arch/x86_64/kernel/apic.c
+++ b/arch/x86_64/kernel/apic.c
@@ -785,7 +785,7 @@ static int __init calibrate_APIC_clock(void)
 	 * value into the APIC clock, we just want to get the
 	 * counter running for calibration.
 	 */
-	__setup_APIC_LVTT(1000000000);
+	__setup_APIC_LVTT(0xffffffff);
 
 	apic_start = apic_read(APIC_TMCCT);
 #ifdef CONFIG_X86_PM_TIMER