From: Hendrik Brueckner <brueckner@redhat.com>
Date: Fri, 11 Dec 2009 10:03:43 -0500
Subject: [s390] clear high-order bits after switch to 64-bit mode
Message-id: <20091211100343.GA4579@redhat.com>
Patchwork-id: 21876
O-Subject: [RHEL5 U5 PATCH 1/1] s390 - kernel: clear high-order bits after
	switching to 64-bit mode
Bugzilla: 546302
RH-Acked-by: Pete Zaitcev <zaitcev@redhat.com>

Description
-----------
IPLing a Linux system fails when the IPL CLEAR option
is not specified. Because the kernel fails early in the
boot process, no kernel messages are printed to the
console.  In rare cases, zfcpdump might fail to start dumping.

When IPLing without the IPL CLEAR option, registers might
contain random values in the high-order bits. When the
kernel switches to 64-bit mode, the registers are not
cleared. This results in (addressing) exceptions and the
kernel might enter an interrupt loop.

To solve the problem, initialize the high-order bits of the
registers with zeroes right after the kernel switched to
64-bit mode.

Bugzilla
--------
BZ 546302
https://bugzilla.redhat.com/show_bug.cgi?id=546302

Upstream status of the patch
----------------------------
The patch will be upstream as of kernel version 2.6.33
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=cf87b7439ec81b9374e7772e44e9cb2eb9e57160

Test status
-----------
The patch has been tested and fixes the problem.
The fix has been verified by the IBM test department.

Please ACK.

With best regards,

	Hendrik


diff --git a/arch/s390/kernel/head64.S b/arch/s390/kernel/head64.S
index 37b2831..c062898 100644
--- a/arch/s390/kernel/head64.S
+++ b/arch/s390/kernel/head64.S
@@ -104,6 +104,8 @@ startup_continue:
         slr   %r0,%r0                    # set cpuid to zero
         sigp  %r1,%r0,0x12               # switch to esame mode
 	sam64				 # switch to 64 bit mode
+	llgfr	%r13,%r13		 # clear high-order half of base reg
+	lmh	%r0,%r15,.Lzero64-.LPG1(%r13) # clear high-order half
 	lctlg %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
 	lg    %r12,.Lparmaddr-.LPG1(%r13)# pointer to parameter area
 					 # move IPL device to lowcore
@@ -346,6 +348,7 @@ startup_continue:
 .L4malign:.quad 0xffffffffffc00000
 .Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
 .Lnop:	.long  0x07000700
+.Lzero64:.fill	16,4,0x0
 #ifdef CONFIG_ZFCPDUMP
 .Lcurrent_cpu:
 	.long 0x0