From: AMEET M. PARANJAPE <aparanja@redhat.com>
Date: Thu, 15 Jan 2009 16:37:20 -0500
Subject: [ppc] cell: fix GDB watchpoints
Message-id: 20090115213615.30660.61055.sendpatchset@squad5-lp1.lab.bos.redhat.com
O-Subject: [PATCH RHEL5.4 BZ480239] powerpc/cell: Fix GDB watchpoints
Bugzilla: 480239
RH-Acked-by: David Howells <dhowells@redhat.com>

RHBZ#:
======
https://bugzilla.redhat.com/show_bug.cgi?id=480239

Description:
===========
An earlier patch attempted to fix GDB watchpoints by enabling the DABRX
register at boot time. Unfortunately, this did not work on SMP setups,
where secondary CPUs were still using the power-on DABRX value.

This introduces the same change for secondary CPUs on cell as well.

RHEL Version Found:
================
RHEL 5.3

kABI Status:
============
No symbols were harmed.

Brew:
=====
Built on all platforms.
http://brewweb.devel.redhat.com/brew/taskinfo?taskID=1650472

Upstream Status:
================
commit 960cedb4e3eedec6394f224fc832c7a23f35a799

Test Status:
============
The test case is the GDB test suite running on a CPU other than the boot CPU.
e.g. like so:

   numactl --physcpubind=1 make check

Compare results against those found when running on the boot CPU:

   numactl --physcpubind=0 make check

You will find a couple of additional FAILs reported on CPU 1, all related to
watchpoint support.  This behavior is incorrect.

With this patch applied the same list of FAILs on CPU 1 are seen on CPU 0, which
is the expected result.
===============================================================
Ameet Paranjape 978-392-3903 ext 23903
IBM on-site partner

Proposed Patch:
===============

diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index 46aef06..28919c1 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -127,10 +127,15 @@ static int __init smp_iic_probe(void)
 	return cpus_weight(cpu_possible_map);
 }
 
-static void __devinit smp_iic_setup_cpu(int cpu)
+static void __devinit smp_cell_setup_cpu(int cpu)
 {
 	if (cpu != boot_cpuid)
 		iic_setup_cpu();
+
+	/*
+	 * change default DABRX to allow user watchpoints
+	 */
+	mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
 }
 
 static DEFINE_SPINLOCK(timebase_lock);
@@ -190,7 +195,7 @@ static struct smp_ops_t bpa_iic_smp_ops = {
 	.message_pass	= smp_iic_message_pass,
 	.probe		= smp_iic_probe,
 	.kick_cpu	= smp_cell_kick_cpu,
-	.setup_cpu	= smp_iic_setup_cpu,
+	.setup_cpu	= smp_cell_setup_cpu,
 	.cpu_bootable	= smp_cell_cpu_bootable,
 };