2009-08-31  Joshua W. Boyer  <jwboyer@linux.vnet.ibm.com>

	* sysdeps/powerpc/powerpc32/power6/memcpy.S: Change srdi instruction
	to srwi in 32-bit memcpy for power6.

2009-04-22  Ryan S. Arnold  <rsa@us.ibm.com>

	[BZ #10107]
	* sysdeps/powerpc/powerpc32/power6/memcpy.S (memcpy): Replace cmpldi
	with cmplwi.
	* sysdeps/powerpc/powerpc32/power6/memset.S (memset): Likewise.

Index: glibc-2.5-20061008T1257/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memcpy.S
===================================================================
--- glibc-2.5-20061008T1257.orig/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memcpy.S
+++ glibc-2.5-20061008T1257/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memcpy.S
@@ -208,7 +208,7 @@ L(word_unaligned_short):
     andi. 0,8,3
     beq   cr6,L(wus_8)	/* Handle moves of 8 bytes.  */
 /* At least 9 bytes left.  Get the source word aligned.  */
-    cmpldi	cr1,5,16
+    cmplwi	cr1,5,16
     mr    12,4
     ble   cr6,L(wus_4)  /* Handle moves of 0-8 bytes.  */
     mr    11,3
@@ -220,7 +220,7 @@ L(word_unaligned_short):
     subf  10,0,5
     add   12,4,0
     blt   cr6,5f
-    srdi  7,6,16
+    srwi  7,6,16
     bgt	  cr6,3f
     sth   6,0(3)
     b     7f
Index: glibc-2.5-20061008T1257/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memset.S
===================================================================
--- glibc-2.5-20061008T1257.orig/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memset.S
+++ glibc-2.5-20061008T1257/powerpc-cpu/sysdeps/powerpc/powerpc32/power6/memset.S
@@ -381,7 +381,7 @@ L(cacheAligned):
 	blt	cr1,L(cacheAligned1)
 	li	rMEMP2,128
 L(cacheAlignedx):
-	cmpldi	cr5,rLEN,640
+	cmplwi	cr5,rLEN,640
 	blt	cr6,L(cacheAligned128)
 	bgt	cr5,L(cacheAligned512)
 	cmplwi	cr6,rLEN,512