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<title>PIC16HV753</title>
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<ul class="classMenu">
<li><a href="index.html">All</a></li>
<li><a href="enhanced-mcus.html">Enhanced</a></li>
<li><a href="extended-mcus.html">Extended</a></li>
<li><a href="regular-mcus.html">Regular</a></li>
<li><a href="12-bits-mcus.html">12 bits</a></li>
<li><a href="14-bits-mcus.html">14 bits</a></li>
<li><a href="16-bits-mcus.html">16 bits</a></li>
<li><a href="mcus-by-ram-size.html">by RAM size</a></li>
<li><a href="mcus-by-rom-size.html">by ROM size</a></li>
<li><a href="mcus-by-eeprom-size.html">by EEPROM size</a></li>
</ul>
<ul class="tabs">
<li><a href="PIC16HV753-feat.html">Features</a></li>
<li><a href="PIC16HV753-conf.html">Configuration Bits</a></li>
<li><a href="PIC16HV753-ram.html">RAM map</a></li>
<li class="selected"><a href="PIC16HV753-sfr.html">SFR map</a></li>
</ul>
<table class="sfrMap">
<tr><th colspan=9 class="sfrTableName">PIC16HV753</th></tr>
<tr class="sfrGap"><td></td></tr>
<tr class="sfrHead">
<td class="vMargin"></td>
<th class="sfrBank">Bank 0</th>
<td class="vMargin"></td>
<th class="sfrBank">Bank 1</th>
<td class="vMargin"></td>
<th class="sfrBank">Bank 2</th>
<td class="vMargin"></td>
<th class="sfrBank">Bank 3</th>
<td class="vMargin"></td>
</tr>
<tr class="sfrGap"><td></td></tr>
<tr>
<td class="vMargin"></td>
<td class="sfrColumn">
<table>
<tr id="INDF">
<th class="sfrName">INDF</th>
<td class="sfrAddr">0x000</td>
</tr>
<tr id="TMR0">
<th class="sfrName">TMR0</th>
<td class="sfrAddr">0x001</td>
</tr>
<tr id="PCL">
<th class="sfrName">PCL</th>
<td class="sfrAddr">0x002</td>
</tr>
<tr id="STATUS">
<th class="sfrName">STATUS</th>
<td class="sfrAddr">0x003</td>
</tr>
<tr id="FSR">
<th class="sfrName">FSR</th>
<td class="sfrAddr">0x004</td>
</tr>
<tr id="PORTA">
<th class="sfrName">PORTA</th>
<td class="sfrAddr">0x005</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="PORTC">
<th class="sfrName">PORTC</th>
<td class="sfrAddr">0x007</td>
</tr>
<tr id="IOCAF">
<th class="sfrName">IOCAF</th>
<td class="sfrAddr">0x008</td>
</tr>
<tr id="IOCCF">
<th class="sfrName">IOCCF</th>
<td class="sfrAddr">0x009</td>
</tr>
<tr id="PCLATH">
<th class="sfrName">PCLATH</th>
<td class="sfrAddr">0x00A</td>
</tr>
<tr id="INTCON">
<th class="sfrName">INTCON</th>
<td class="sfrAddr">0x00B</td>
</tr>
<tr id="PIR1">
<th class="sfrName">PIR1</th>
<td class="sfrAddr">0x00C</td>
</tr>
<tr id="PIR2">
<th class="sfrName">PIR2</th>
<td class="sfrAddr">0x00D</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="TMR1">
<th class="sfrNameX">TMR1<span>TMR1L</span></th>
<td class="sfrAddr">0x00F</td>
</tr>
<tr id="TMR1H">
<th class="sfrName">TMR1H</th>
<td class="sfrAddr">0x010</td>
</tr>
<tr id="T1CON">
<th class="sfrName">T1CON</th>
<td class="sfrAddr">0x011</td>
</tr>
<tr id="T1GCON">
<th class="sfrName">T1GCON</th>
<td class="sfrAddr">0x012</td>
</tr>
<tr id="CCPR1">
<th class="sfrNameX">CCPR1<span>CCPR1L</span></th>
<td class="sfrAddr">0x013</td>
</tr>
<tr id="CCPR1H">
<th class="sfrName">CCPR1H</th>
<td class="sfrAddr">0x014</td>
</tr>
<tr id="CCP1CON">
<th class="sfrName">CCP1CON</th>
<td class="sfrAddr">0x015</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="ADRES">
<th class="sfrNameX">ADRES<span>ADRESL</span></th>
<td class="sfrAddr">0x01C</td>
</tr>
<tr id="ADRESH">
<th class="sfrName">ADRESH</th>
<td class="sfrAddr">0x01D</td>
</tr>
<tr id="ADCON0">
<th class="sfrName">ADCON0</th>
<td class="sfrAddr">0x01E</td>
</tr>
<tr id="ADCON1">
<th class="sfrName">ADCON1</th>
<td class="sfrAddr">0x01F</td>
</tr>
</table>
</td>
<td class="vMargin"></td>
<td class="sfrColumn">
<table>
<tr><th class="sfrSep"> </th></tr>
<tr id="OPTION_REG">
<th class="sfrName">OPTION_REG</th>
<td class="sfrAddr">0x081</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="TRISA">
<th class="sfrName">TRISA</th>
<td class="sfrAddr">0x085</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="TRISC">
<th class="sfrName">TRISC</th>
<td class="sfrAddr">0x087</td>
</tr>
<tr id="IOCAP">
<th class="sfrName">IOCAP</th>
<td class="sfrAddr">0x088</td>
</tr>
<tr id="IOCCP">
<th class="sfrName">IOCCP</th>
<td class="sfrAddr">0x089</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="PIE1">
<th class="sfrName">PIE1</th>
<td class="sfrAddr">0x08C</td>
</tr>
<tr id="PIE2">
<th class="sfrName">PIE2</th>
<td class="sfrAddr">0x08D</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="OSCCON">
<th class="sfrName">OSCCON</th>
<td class="sfrAddr">0x08F</td>
</tr>
<tr id="FVR1CON0">
<th class="sfrName">FVR1CON0</th>
<td class="sfrAddr">0x090</td>
</tr>
<tr id="DAC1CON0">
<th class="sfrName">DAC1CON0</th>
<td class="sfrAddr">0x091</td>
</tr>
<tr id="DAC1CON1">
<th class="sfrName">DAC1CON1</th>
<td class="sfrAddr">0x092</td>
</tr>
<tr id="DAC1CON2">
<th class="sfrName">DAC1CON2</th>
<td class="sfrAddr">0x093</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="OPA1CON">
<th class="sfrName">OPA1CON</th>
<td class="sfrAddr">0x096</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="C2CON0">
<th class="sfrNameX">C2CON0<span>CM2CON0</span></th>
<td class="sfrAddr">0x09B</td>
</tr>
<tr id="C2CON1">
<th class="sfrNameX">C2CON1<span>CM2CON1</span></th>
<td class="sfrAddr">0x09C</td>
</tr>
<tr id="C1CON0">
<th class="sfrNameX">C1CON0<span>CM1CON0</span></th>
<td class="sfrAddr">0x09D</td>
</tr>
<tr id="C1CON1">
<th class="sfrNameX">C1CON1<span>CM1CON1</span></th>
<td class="sfrAddr">0x09E</td>
</tr>
<tr id="CMOUT">
<th class="sfrNameX">CMOUT<span>MCOUT</span></th>
<td class="sfrAddr">0x09F</td>
</tr>
</table>
</td>
<td class="vMargin"></td>
<td class="sfrColumn">
<table>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="LATA">
<th class="sfrName">LATA</th>
<td class="sfrAddr">0x105</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="LATC">
<th class="sfrName">LATC</th>
<td class="sfrAddr">0x107</td>
</tr>
<tr id="IOCAN">
<th class="sfrName">IOCAN</th>
<td class="sfrAddr">0x108</td>
</tr>
<tr id="IOCCN">
<th class="sfrName">IOCCN</th>
<td class="sfrAddr">0x109</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="WPUA">
<th class="sfrName">WPUA</th>
<td class="sfrAddr">0x10C</td>
</tr>
<tr id="WPUC">
<th class="sfrName">WPUC</th>
<td class="sfrAddr">0x10D</td>
</tr>
<tr id="SLRCONC">
<th class="sfrName">SLRCONC</th>
<td class="sfrAddr">0x10E</td>
</tr>
<tr id="PCON">
<th class="sfrName">PCON</th>
<td class="sfrAddr">0x10F</td>
</tr>
<tr id="TMR2">
<th class="sfrName">TMR2</th>
<td class="sfrAddr">0x110</td>
</tr>
<tr id="PR2">
<th class="sfrName">PR2</th>
<td class="sfrAddr">0x111</td>
</tr>
<tr id="T2CON">
<th class="sfrName">T2CON</th>
<td class="sfrAddr">0x112</td>
</tr>
<tr id="TMR4A">
<th class="sfrName">TMR4A</th>
<td class="sfrAddr">0x113</td>
</tr>
<tr id="PR4A">
<th class="sfrName">PR4A</th>
<td class="sfrAddr">0x114</td>
</tr>
<tr id="T4ACON0">
<th class="sfrName">T4ACON0</th>
<td class="sfrAddr">0x115</td>
</tr>
<tr id="T4ACON1">
<th class="sfrName">T4ACON1</th>
<td class="sfrAddr">0x116</td>
</tr>
<tr id="TMR6A">
<th class="sfrName">TMR6A</th>
<td class="sfrAddr">0x117</td>
</tr>
<tr id="PR6A">
<th class="sfrName">PR6A</th>
<td class="sfrAddr">0x118</td>
</tr>
<tr id="T6ACON0">
<th class="sfrName">T6ACON0</th>
<td class="sfrAddr">0x119</td>
</tr>
<tr id="T6ACON1">
<th class="sfrName">T6ACON1</th>
<td class="sfrAddr">0x11A</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="SLPCCON0">
<th class="sfrName">SLPCCON0</th>
<td class="sfrAddr">0x11E</td>
</tr>
<tr id="SLPCCON1">
<th class="sfrName">SLPCCON1</th>
<td class="sfrAddr">0x11F</td>
</tr>
</table>
</td>
<td class="vMargin"></td>
<td class="sfrColumn">
<table>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="ANSELA">
<th class="sfrName">ANSELA</th>
<td class="sfrAddr">0x185</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="ANSELC">
<th class="sfrName">ANSELC</th>
<td class="sfrAddr">0x187</td>
</tr>
<tr id="APFCON">
<th class="sfrName">APFCON</th>
<td class="sfrAddr">0x188</td>
</tr>
<tr id="OSCTUNE">
<th class="sfrName">OSCTUNE</th>
<td class="sfrAddr">0x189</td>
</tr>
<tr><th class="sfrSep"> </th></tr>
<tr><th class="sfrSep"> </th></tr>
<tr id="PMCON1">
<th class="sfrName">PMCON1</th>
<td class="sfrAddr">0x18C</td>
</tr>
<tr id="PMCON2">
<th class="sfrName">PMCON2</th>
<td class="sfrAddr">0x18D</td>
</tr>
<tr id="PMADR">
<th class="sfrNameX">PMADR<span>PMADRL</span></th>
<td class="sfrAddr">0x18E</td>
</tr>
<tr id="PMADRH">
<th class="sfrName">PMADRH</th>
<td class="sfrAddr">0x18F</td>
</tr>
<tr id="PMDAT">
<th class="sfrNameX">PMDAT<span>PMDATL</span></th>
<td class="sfrAddr">0x190</td>
</tr>
<tr id="PMDATH">
<th class="sfrName">PMDATH</th>
<td class="sfrAddr">0x191</td>
</tr>
<tr id="COG1PHR">
<th class="sfrName">COG1PHR</th>
<td class="sfrAddr">0x192</td>
</tr>
<tr id="COG1PHF">
<th class="sfrName">COG1PHF</th>
<td class="sfrAddr">0x193</td>
</tr>
<tr id="COG1BKR">
<th class="sfrName">COG1BKR</th>
<td class="sfrAddr">0x194</td>
</tr>
<tr id="COG1BKF">
<th class="sfrName">COG1BKF</th>
<td class="sfrAddr">0x195</td>
</tr>
<tr id="COG1DBR">
<th class="sfrName">COG1DBR</th>
<td class="sfrAddr">0x196</td>
</tr>
<tr id="COG1DBF">
<th class="sfrName">COG1DBF</th>
<td class="sfrAddr">0x197</td>
</tr>
<tr id="COG1CON0">
<th class="sfrName">COG1CON0</th>
<td class="sfrAddr">0x198</td>
</tr>
<tr id="COG1CON1">
<th class="sfrName">COG1CON1</th>
<td class="sfrAddr">0x199</td>
</tr>
<tr id="COG1RIS">
<th class="sfrName">COG1RIS</th>
<td class="sfrAddr">0x19A</td>
</tr>
<tr id="COG1RSIM">
<th class="sfrName">COG1RSIM</th>
<td class="sfrAddr">0x19B</td>
</tr>
<tr id="COG1FIS">
<th class="sfrName">COG1FIS</th>
<td class="sfrAddr">0x19C</td>
</tr>
<tr id="COG1FSIM">
<th class="sfrName">COG1FSIM</th>
<td class="sfrAddr">0x19D</td>
</tr>
<tr id="COG1ASD0">
<th class="sfrName">COG1ASD0</th>
<td class="sfrAddr">0x19E</td>
</tr>
<tr id="COG1ASD1">
<th class="sfrName">COG1ASD1</th>
<td class="sfrAddr">0x19F</td>
</tr>
</table>
</td>
<td class="vMargin"></td>
</tr>
<tr class="ramGap"><td></td></tr>
<tr><td colspan=9 class="ramSumEx">The mirror of [PCL, STATUS, ...] are not shown.</td></tr>
</table>
<div class="legendContainer">
<div class="legend">
<p class="sfrNameEx"> <span class="explanation">SFR</span></p>
<p class="sfrNameXEx"> <span class="explanation">SFR with alias name.</span></p>
</div>
</div>
<div class="legendContainer">
<p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:35 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
</div>
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distrib
>
Mageia
>
5
>
x86_64
>
media
>
core-release
>
by-pkgid
>
ea0480943e5f9837b0cc4165bae8d1c3
>
files
>
928
