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gputils-1.2.0-4.mga5.x86_64.rpm

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    <table class="configList">
      <tr><th colspan=5 class="confTableName">PIC16F724</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=4 class="configWord">CONFIG1 (address:0x2007, mask:0xFFFF)</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">FOSC -- Oscillator Selection bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = LP</td>
        <td class="confSwValue">0x3FF8</td>
        <td class="confSwExpl">LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = XT</td>
        <td class="confSwValue">0x3FF9</td>
        <td class="confSwExpl">XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = HS</td>
        <td class="confSwValue">0x3FFA</td>
        <td class="confSwExpl">HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = EC</td>
        <td class="confSwValue">0x3FFB</td>
        <td class="confSwExpl">EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = INTOSCIO</td>
        <td class="confSwValue">0x3FFC</td>
        <td class="confSwExpl">INTOSCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = INTOSCCLK</td>
        <td class="confSwValue">0x3FFD</td>
        <td class="confSwExpl">INTOSC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = EXTRCIO</td>
        <td class="confSwValue">0x3FFE</td>
        <td class="confSwExpl">RCIO oscillator: I/O function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = EXTRCCLK</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">RC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, RC on RA7/OSC1/CLKIN.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">WDTE -- Watchdog Timer Enable bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WDTE = OFF</td>
        <td class="confSwValue">0x3FF7</td>
        <td class="confSwExpl">WDT disabled and can be enabled by SWDTEN bit of the WDTCON register.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WDTE = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">WDT enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">PWRTE -- Power-up Timer Enable bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PWRTE = ON</td>
        <td class="confSwValue">0x3FEF</td>
        <td class="confSwExpl">PWRT enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PWRTE = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">PWRT disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">MCLRE -- RE3/MCLR pin function select bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">MCLRE = OFF</td>
        <td class="confSwValue">0x3FDF</td>
        <td class="confSwExpl">RE3/MCLR pin function is digital input, MCLR internally tied to VDD.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">MCLRE = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">RE3/MCLR pin function is MCLR.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">CP -- Code Protection bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">CP = ON</td>
        <td class="confSwValue">0x3FBF</td>
        <td class="confSwExpl">Program memory code protection is enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">CP = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">Program memory code protection is disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">BOREN -- Brown-out Reset Selection bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = OFF</td>
        <td class="confSwValue">0x3CFF</td>
        <td class="confSwExpl">BOR disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = NSLEEP</td>
        <td class="confSwValue">0x3EFF</td>
        <td class="confSwExpl">BOR enabled during operation and disabled in Sleep.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">BOR enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">BORV -- Brown-out Reset Voltage selection bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BORV = 25</td>
        <td class="confSwValue">0x3BFF</td>
        <td class="confSwExpl">Brown-out Reset Voltage (VBOR) set to 2.5 V nominal.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BORV = 19</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">Brown-out Reset Voltage (VBOR) set to 1.9 V nominal.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">PLLEN -- INTOSC PLLEN Enable Bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PLLEN = OFF</td>
        <td class="confSwValue">0x2FFF</td>
        <td class="confSwExpl">INTOSC Frequency is 500 kHz.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PLLEN = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">INTOSC Frequency is 16MHz (32x).</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">DEBUG -- In-Circuit Debugger Mode bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">DEBUG = ON</td>
        <td class="confSwValue">0x1FFF</td>
        <td class="confSwExpl">In-Circuit Debugger enabled, RB6/ICSPCLK and RB7/ICSPDAT are dedicated to the debugger.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">DEBUG = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">In-Circuit Debugger disabled, RB6/ICSPCLK and RB7/ICSPDAT are general purpose I/O pins.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=4 class="configWord">CONFIG2 (address:0x2008, mask:0xFFFF)</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">VCAPEN -- Voltage Regulator Capacitor Enable bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">VCAPEN = RA0</td>
        <td class="confSwValue">0x3FCF</td>
        <td class="confSwExpl">VCAP functionality is enabled on RA0.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">VCAPEN = RA5</td>
        <td class="confSwValue">0x3FDF</td>
        <td class="confSwExpl">VCAP functionality is enabled on RA5.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">VCAPEN = RA6</td>
        <td class="confSwValue">0x3FEF</td>
        <td class="confSwExpl">VCAP functionality is enabled on RA6.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">VCAPEN = DIS</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">All VCAP pin functions are disabled.</td>
        <td class="vMargin"></td>
      </tr>
    </table>
    <div class="legendContainer">
      <p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:34 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
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