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<table class="configList">
<tr><th colspan=5 class="confTableName">PIC18LF45K50</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG1L (address:0x300000, mask:0x00)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PLLSEL -- PLL Selection</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PLLSEL = PLL4X</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">4x clock multiplier.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PLLSEL = PLL3X</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">3x clock multiplier.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CFGPLLEN -- PLL Enable Configuration bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CFGPLLEN = OFF</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">PLL Disabled (firmware controlled).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CFGPLLEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PLL Enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPUDIV -- CPU System Clock Postscaler</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPUDIV = NOCLKDIV</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">CPU uses system clock (no divide).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPUDIV = CLKDIV2</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">CPU uses system clock divided by 2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPUDIV = CLKDIV3</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">CPU uses system clock divided by 3.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPUDIV = CLKDIV6</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">CPU uses system clock divided by 6.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">LS48MHZ -- Low Speed USB mode with 48 MHz system clock</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LS48MHZ = SYS24X4</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">System clock at 24 MHz, USB clock divider is set to 4.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LS48MHZ = SYS48X8</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">System clock at 48 MHz, USB clock divider is set to 8.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG1H (address:0x300001, mask:0x25)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FOSC -- Oscillator Selection</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = LP</td>
<td class="confSwValue">0xF0</td>
<td class="confSwExpl">LP oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = XT</td>
<td class="confSwValue">0xF1</td>
<td class="confSwExpl">XT oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = HSH</td>
<td class="confSwValue">0xF2</td>
<td class="confSwExpl">HS oscillator, high power 16MHz to 25MHz.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = HSM</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">HS oscillator, medium power 4MHz to 16MHz.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECHCLKO</td>
<td class="confSwValue">0xF4</td>
<td class="confSwExpl">EC oscillator, high power 16MHz to 48MHz, clock output on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECHIO</td>
<td class="confSwValue">0xF5</td>
<td class="confSwExpl">EC oscillator, high power 16MHz to 48MHz.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = RCCLKO</td>
<td class="confSwValue">0xF6</td>
<td class="confSwExpl">External RC oscillator, clock output on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = RCIO</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">External RC oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = INTOSCIO</td>
<td class="confSwValue">0xF8</td>
<td class="confSwExpl">Internal oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = INTOSCCLKO</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">Internal oscillator, clock output on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECMCLKO</td>
<td class="confSwValue">0xFA</td>
<td class="confSwExpl">EC oscillator, medium power 4MHz to 16MHz, clock output on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECMIO</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">EC oscillator, medium power 4MHz to 16MHz.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECLCLKO</td>
<td class="confSwValue">0xFC</td>
<td class="confSwExpl">EC oscillator, low power <4MHz, clock output on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECLIO</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">EC oscillator, low power <4MHz.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PCLKEN -- Primary Oscillator Shutdown</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PCLKEN = OFF</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Primary oscillator shutdown firmware controlled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PCLKEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Primary oscillator enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FCMEN -- Fail-Safe Clock Monitor</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = OFF</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">IESO -- Internal/External Oscillator Switchover</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = OFF</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Oscillator Switchover mode disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Oscillator Switchover mode enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2L (address:0x300002, mask:0x5F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">nPWRTEN -- Power-up Timer Enable</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">nPWRTEN = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Power up timer enabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">nPWRTEN = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Power up timer disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BOREN -- Brown-out Reset Enable</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = OFF</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">BOR disabled in hardware (SBOREN is ignored).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">BOR controlled by firmware (SBOREN is enabled).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = NOSLP</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">BOR enabled in hardware, disabled in Sleep mode (SBOREN is ignored).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = SBORDIS</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">BOR enabled in hardware (SBOREN is ignored).</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BORV -- Brown-out Reset Voltage</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 285</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">BOR set to 2.85V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 250</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">BOR set to 2.5V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 220</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">BOR set to 2.2V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 190</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">BOR set to 1.9V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">nLPBOR -- Low-Power Brown-out Reset</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">nLPBOR = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Low-Power Brown-out Reset enabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">nLPBOR = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Low-Power Brown-out Reset disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2H (address:0x300003, mask:0x3F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDTEN -- Watchdog Timer Enable bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = OFF</td>
<td class="confSwValue">0xFC</td>
<td class="confSwExpl">WDT disabled in hardware (SWDTEN ignored).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = NOSLP</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">WDT enabled in hardware, disabled in Sleep mode (SWDTEN ignored).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = SWON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">WDT controlled by firmware (SWDTEN enabled).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">WDT enabled in hardware (SWDTEN ignored).</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDTPS -- Watchdog Timer Postscaler</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 1</td>
<td class="confSwValue">0xC3</td>
<td class="confSwExpl">1:1.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 2</td>
<td class="confSwValue">0xC7</td>
<td class="confSwExpl">1:2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 4</td>
<td class="confSwValue">0xCB</td>
<td class="confSwExpl">1:4.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 8</td>
<td class="confSwValue">0xCF</td>
<td class="confSwExpl">1:8.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 16</td>
<td class="confSwValue">0xD3</td>
<td class="confSwExpl">1:16.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 32</td>
<td class="confSwValue">0xD7</td>
<td class="confSwExpl">1:32.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 64</td>
<td class="confSwValue">0xDB</td>
<td class="confSwExpl">1:64.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 128</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">1:128.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 256</td>
<td class="confSwValue">0xE3</td>
<td class="confSwExpl">1:256.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 512</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">1:512.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 1024</td>
<td class="confSwValue">0xEB</td>
<td class="confSwExpl">1:1024.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 2048</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">1:2048.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 4096</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">1:4096.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 8192</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">1:8192.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 16384</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">1:16384.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 32768</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">1:32768.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG3H (address:0x300005, mask:0xD3)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CCP2MX -- CCP2 MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP2MX = RB3</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">CCP2 input/output is multiplexed with RB3.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP2MX = RC1</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">CCP2 input/output is multiplexed with RC1.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PBADEN -- PORTB A/D Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PBADEN = OFF</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">PORTB<5:0> pins are configured as digital I/O on Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PBADEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PORTB<5:0> pins are configured as analog input channels on Reset.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">T3CMX -- Timer3 Clock Input MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T3CMX = RB5</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">T3CKI function is on RB5.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T3CMX = RC0</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">T3CKI function is on RC0.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">SDOMX -- SDO Output MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">SDOMX = RC7</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">SDO function is on RC7.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">SDOMX = RB3</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">SDO function is on RB3.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">MCLRE -- Master Clear Reset Pin Enable</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = OFF</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">RE3 input pin enabled; external MCLR disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">MCLR pin enabled; RE3 input disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG4L (address:0x300006, mask:0x85)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">STVREN -- Stack Full/Underflow Reset</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = OFF</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Stack full/underflow will not cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Stack full/underflow will cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">LVP -- Single-Supply ICSP Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = OFF</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Single-Supply ICSP disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Single-Supply ICSP enabled if MCLRE is also 1.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">ICPRT -- Dedicated In-Circuit Debug/Programming Port Enable</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">ICPRT = OFF</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">ICPORT disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">ICPRT = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">ICPORT enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">XINST -- Extended Instruction Set Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">XINST = OFF</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Instruction set extension and Indexed Addressing mode disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">XINST = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Instruction set extension and Indexed Addressing mode enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">DEBUG -- Background Debugger Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5L (address:0x300008, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP0 -- Block 0 Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP1 -- Block 1 Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP2 -- Block 2 Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP3 -- Block 3 Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5H (address:0x300009, mask:0xC0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPB -- Boot Block Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot block is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot block is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPD -- Data EEPROM Code Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM is code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM is not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6L (address:0x30000A, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT0 -- Block 0 Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (0800-1FFFh) is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (0800-1FFFh) is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT1 -- Block 1 Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (2000-3FFFh) is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (2000-3FFFh) is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT2 -- Block 2 Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 (04000-5FFFh) is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 (04000-5FFFh) is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT3 -- Block 3 Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 (06000-7FFFh) is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 (06000-7FFFh) is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6H (address:0x30000B, mask:0xE0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTC -- Configuration Registers Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = ON</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) are write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) are not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTB -- Boot Block Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot block (0000-7FFh) is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot block (0000-7FFh) is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTD -- Data EEPROM Write Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM is write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM is not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7L (address:0x30000C, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR0 -- Block 0 Table Read Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 is protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 is not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR1 -- Block 1 Table Read Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 is protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 is not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR2 -- Block 2 Table Read Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 is protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 is not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR3 -- Block 3 Table Read Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 is protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 is not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7H (address:0x30000D, mask:0x40)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTRB -- Boot Block Table Read Protect</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot block is protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot block is not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
</table>
<div class="legendContainer">
<p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:39 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
</div>
</body>
</html>
distrib
>
Mageia
>
5
>
x86_64
>
media
>
core-release
>
by-pkgid
>
ea0480943e5f9837b0cc4165bae8d1c3
>
files
>
2245
