<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Frameset//EN" "http://www.w3.org/TR/html4/frameset.dtd">
<html lang="en">
<head>
<title>PIC18LF45K22</title>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
<link rel="stylesheet" type="text/css" href="main.css">
</head>
<body>
<ul class="classMenu">
<li><a href="index.html">All</a></li>
<li><a href="enhanced-mcus.html">Enhanced</a></li>
<li><a href="extended-mcus.html">Extended</a></li>
<li><a href="regular-mcus.html">Regular</a></li>
<li><a href="12-bits-mcus.html">12 bits</a></li>
<li><a href="14-bits-mcus.html">14 bits</a></li>
<li><a href="16-bits-mcus.html">16 bits</a></li>
<li><a href="mcus-by-ram-size.html">by RAM size</a></li>
<li><a href="mcus-by-rom-size.html">by ROM size</a></li>
<li><a href="mcus-by-eeprom-size.html">by EEPROM size</a></li>
</ul>
<ul class="tabs">
<li><a href="PIC18LF45K22-feat.html">Features</a></li>
<li class="selected"><a href="PIC18LF45K22-conf.html">Configuration Bits</a></li>
<li><a href="PIC18LF45K22-ram.html">RAM map</a></li>
<li><a href="PIC18LF45K22-sfr.html">SFR map</a></li>
</ul>
<table class="configList">
<tr><th colspan=5 class="confTableName">PIC18LF45K22</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG1H (address:0x300001, mask:0x25)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FOSC -- Oscillator Selection bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = LP</td>
<td class="confSwValue">0xF0</td>
<td class="confSwExpl">LP oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = XT</td>
<td class="confSwValue">0xF1</td>
<td class="confSwExpl">XT oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = HSHP</td>
<td class="confSwValue">0xF2</td>
<td class="confSwExpl">HS oscillator (high power > 16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = HSMP</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">HS oscillator (medium power 4-16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECHP</td>
<td class="confSwValue">0xF4</td>
<td class="confSwExpl">EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECHPIO6</td>
<td class="confSwValue">0xF5</td>
<td class="confSwExpl">EC oscillator (high power, >16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = RC</td>
<td class="confSwValue">0xF6</td>
<td class="confSwExpl">External RC oscillator, CLKOUT function on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = RCIO6</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">External RC oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = INTIO67</td>
<td class="confSwValue">0xF8</td>
<td class="confSwExpl">Internal oscillator block.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = INTIO7</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">Internal oscillator block, CLKOUT function on OSC2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECMP</td>
<td class="confSwValue">0xFA</td>
<td class="confSwExpl">EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECMPIO6</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">EC oscillator (medium power, 500 kHz-16 MHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECLP</td>
<td class="confSwValue">0xFC</td>
<td class="confSwExpl">EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FOSC = ECLPIO6</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">EC oscillator (low power, <500 kHz).</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PLLCFG -- 4X PLL Enable</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PLLCFG = OFF</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">Oscillator used directly.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PLLCFG = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Oscillator multiplied by 4.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PRICLKEN -- Primary clock enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PRICLKEN = OFF</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Primary clock can be disabled by software.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PRICLKEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Primary clock is always enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FCMEN -- Fail-Safe Clock Monitor Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = OFF</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">IESO -- Internal/External Oscillator Switchover bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = OFF</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Oscillator Switchover mode disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Oscillator Switchover mode enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2L (address:0x300002, mask:0x1F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PWRTEN -- Power-up Timer Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWRTEN = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Power up timer enabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWRTEN = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Power up timer disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BOREN -- Brown-out Reset Enable bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = OFF</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">Brown-out Reset disabled in hardware and software.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Brown-out Reset enabled and controlled by software (SBOREN is enabled).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = NOSLP</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = SBORDIS</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Brown-out Reset enabled in hardware only (SBOREN is disabled).</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BORV -- Brown Out Reset Voltage bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 285</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">VBOR set to 2.85 V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 250</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">VBOR set to 2.50 V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 220</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">VBOR set to 2.20 V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 190</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">VBOR set to 1.90 V nominal.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2H (address:0x300003, mask:0x3F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDTEN -- Watchdog Timer Enable bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = OFF</td>
<td class="confSwValue">0xFC</td>
<td class="confSwExpl">Watch dog timer is always disabled. SWDTEN has no effect.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = NOSLP</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = SWON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">WDT is controlled by SWDTEN bit of the WDTCON register.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">WDT is always enabled. SWDTEN bit has no effect.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDTPS -- Watchdog Timer Postscale Select bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 1</td>
<td class="confSwValue">0xC3</td>
<td class="confSwExpl">1:1.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 2</td>
<td class="confSwValue">0xC7</td>
<td class="confSwExpl">1:2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 4</td>
<td class="confSwValue">0xCB</td>
<td class="confSwExpl">1:4.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 8</td>
<td class="confSwValue">0xCF</td>
<td class="confSwExpl">1:8.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 16</td>
<td class="confSwValue">0xD3</td>
<td class="confSwExpl">1:16.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 32</td>
<td class="confSwValue">0xD7</td>
<td class="confSwExpl">1:32.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 64</td>
<td class="confSwValue">0xDB</td>
<td class="confSwExpl">1:64.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 128</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">1:128.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 256</td>
<td class="confSwValue">0xE3</td>
<td class="confSwExpl">1:256.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 512</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">1:512.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 1024</td>
<td class="confSwValue">0xEB</td>
<td class="confSwExpl">1:1024.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 2048</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">1:2048.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 4096</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">1:4096.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 8192</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">1:8192.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 16384</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">1:16384.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTPS = 32768</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">1:32768.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG3H (address:0x300005, mask:0xBF)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CCP2MX -- CCP2 MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP2MX = PORTB3</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">CCP2 input/output is multiplexed with RB3.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP2MX = PORTC1</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">CCP2 input/output is multiplexed with RC1.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PBADEN -- PORTB A/D Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PBADEN = OFF</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">PORTB<5:0> pins are configured as digital I/O on Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PBADEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PORTB<5:0> pins are configured as analog input channels on Reset.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CCP3MX -- P3A/CCP3 Mux bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP3MX = PORTE0</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">P3A/CCP3 input/output is mulitplexed with RE0.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CCP3MX = PORTB5</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">P3A/CCP3 input/output is multiplexed with RB5.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">HFOFST -- HFINTOSC Fast Start-up</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">HFOFST = OFF</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">HFINTOSC output and ready status are delayed by the oscillator stable status.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">HFOFST = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">HFINTOSC output and ready status are not delayed by the oscillator stable status.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">T3CMX -- Timer3 Clock input mux bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T3CMX = PORTB5</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">T3CKI is on RB5.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T3CMX = PORTC0</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">T3CKI is on RC0.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">P2BMX -- ECCP2 B output mux bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">P2BMX = PORTC0</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">P2B is on RC0.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">P2BMX = PORTD2</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">P2B is on RD2.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">MCLRE -- MCLR Pin Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = INTMCLR</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">RE3 input pin enabled; MCLR disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = EXTMCLR</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">MCLR pin enabled, RE3 input pin disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG4L (address:0x300006, mask:0x85)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">STVREN -- Stack Full/Underflow Reset Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = OFF</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Stack full/underflow will not cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Stack full/underflow will cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">LVP -- Single-Supply ICSP Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = OFF</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Single-Supply ICSP disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Single-Supply ICSP enabled if MCLRE is also 1.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">XINST -- Extended Instruction Set Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">XINST = OFF</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Instruction set extension and Indexed Addressing mode disabled (Legacy mode).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">XINST = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Instruction set extension and Indexed Addressing mode enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">DEBUG -- Background Debug</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Enabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5L (address:0x300008, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP0 -- Code Protection Block 0</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP1 -- Code Protection Block 1</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP2 -- Code Protection Block 2</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP3 -- Code Protection Block 3</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5H (address:0x300009, mask:0xC0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPB -- Boot Block Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot block (000000-0007FFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot block (000000-0007FFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPD -- Data EEPROM Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6L (address:0x30000A, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT0 -- Write Protection Block 0</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT1 -- Write Protection Block 1</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT2 -- Write Protection Block 2</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT3 -- Write Protection Block 3</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6H (address:0x30000B, mask:0xE0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTC -- Configuration Register Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = ON</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTB -- Boot Block Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot Block (000000-0007FFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot Block (000000-0007FFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTD -- Data EEPROM Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7L (address:0x30000C, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR0 -- Table Read Protection Block 0</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000800-001FFFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR1 -- Table Read Protection Block 1</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (002000-003FFFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR2 -- Table Read Protection Block 2</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR2 = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR2 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 2 (004000-005FFFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR3 -- Table Read Protection Block 3</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR3 = ON</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR3 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 3 (006000-007FFFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7H (address:0x30000D, mask:0x40)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTRB -- Boot Block Table Read Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot Block (000000-0007FFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot Block (000000-0007FFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
</table>
<div class="legendContainer">
<p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:39 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
</div>
</body>
</html>
distrib
>
Mageia
>
5
>
x86_64
>
media
>
core-release
>
by-pkgid
>
ea0480943e5f9837b0cc4165bae8d1c3
>
files
>
2241
