<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Frameset//EN" "http://www.w3.org/TR/html4/frameset.dtd"> <html lang="en"> <head> <title>PIC18F8620</title> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> <link rel="stylesheet" type="text/css" href="main.css"> </head> <body> <ul class="classMenu"> <li><a href="index.html">All</a></li> <li><a href="enhanced-mcus.html">Enhanced</a></li> <li><a href="extended-mcus.html">Extended</a></li> <li><a href="regular-mcus.html">Regular</a></li> <li><a href="12-bits-mcus.html">12 bits</a></li> <li><a href="14-bits-mcus.html">14 bits</a></li> <li><a href="16-bits-mcus.html">16 bits</a></li> <li><a href="mcus-by-ram-size.html">by RAM size</a></li> <li><a href="mcus-by-rom-size.html">by ROM size</a></li> <li><a href="mcus-by-eeprom-size.html">by EEPROM size</a></li> </ul> <ul class="tabs"> <li><a href="PIC18F8620-feat.html">Features</a></li> <li class="selected"><a href="PIC18F8620-conf.html">Configuration Bits</a></li> <li><a href="PIC18F8620-ram.html">RAM map</a></li> <li><a href="PIC18F8620-sfr.html">SFR map</a></li> </ul> <table class="configList"> <tr><th colspan=5 class="confTableName">PIC18F8620</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG1H (address:0x300001, mask:0x27)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">OSC -- Oscillator Selection bits</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = LP</td> <td class="confSwValue">0xF8</td> <td class="confSwExpl">LP oscillator.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = XT</td> <td class="confSwValue">0xF9</td> <td class="confSwExpl">XT oscillator.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = HS</td> <td class="confSwValue">0xFA</td> <td class="confSwExpl">HS oscillator.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = RC</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">RC oscillator w/ OSC2 configured as divide-by-4 clock output.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = EC</td> <td class="confSwValue">0xFC</td> <td class="confSwExpl">EC oscillator w/ OSC2 configured as divide-by-4 clock output.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = ECIO</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">EC oscillator w/ OSC2 configured as RA6.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = HSPLL</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">HS oscillator with PLL enabled; clock frequency = (4 x FOSC).</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSC = RCIO</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">RC oscillator w/ OSC2 configured as RA6.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">OSCS -- Oscillator System Clock Switch Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSCS = ON</td> <td class="confSwValue">0xDF</td> <td class="confSwExpl">Timer1 Oscillator system clock switch option is enabled (oscillator switching is enabled).</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">OSCS = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Oscillator system clock switch option is disabled (main oscillator is source).</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG2L (address:0x300002, mask:0x0F)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">PWRT -- Power-up Timer Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">PWRT = ON</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">PWRT enabled.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">PWRT = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">PWRT disabled.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">BOR -- Brown-out Reset Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">BOR = OFF</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">Brown-out Reset disabled.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">BOR = ON</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Brown-out Reset enabled.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">BORV -- Brown-out Reset Voltage bits</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">BORV = 45</td> <td class="confSwValue">0xF3</td> <td class="confSwExpl">VBOR set to 4.5V.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">BORV = 42</td> <td class="confSwValue">0xF7</td> <td class="confSwExpl">VBOR set to 4.2V.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">BORV = 27</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">VBOR set to 2.7V.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">BORV = 25</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">VBOR set to 2.5V.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG2H (address:0x300003, mask:0x0F)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WDT -- Watchdog Timer Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDT = OFF</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">WDT disabled (control is placed on the SWDTEN bit).</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDT = ON</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">WDT enabled.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WDTPS -- Watchdog Timer Postscale Select bits</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 1</td> <td class="confSwValue">0xF1</td> <td class="confSwExpl">1:1.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 2</td> <td class="confSwValue">0xF3</td> <td class="confSwExpl">1:2.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 4</td> <td class="confSwValue">0xF5</td> <td class="confSwExpl">1:4.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 8</td> <td class="confSwValue">0xF7</td> <td class="confSwExpl">1:8.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 16</td> <td class="confSwValue">0xF9</td> <td class="confSwExpl">1:16.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 32</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">1:32.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 64</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">1:64.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WDTPS = 128</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">1:128.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG3L (address:0x300004, mask:0x83)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">MODE -- Processor Mode Select bits</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">MODE = EM</td> <td class="confSwValue">0xFC</td> <td class="confSwExpl">Extended Microcontroller mode.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">MODE = MPB</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">Microprocessor with Boot Block mode.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">MODE = MP</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">Microprocessor mode.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">MODE = MC</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Microcontroller mode.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WAIT -- External Bus Data Wait Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WAIT = ON</td> <td class="confSwValue">0x7F</td> <td class="confSwExpl">Wait selections for table reads and table writes are determined by the WAIT1:WAIT0 bits (MEMCOM<5:4>).</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WAIT = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Wait selections unavailable for table reads and table writes.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG3H (address:0x300005, mask:0x03)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CCP2MUX -- CCP2 Mux bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CCP2MUX = OFF</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">CCP2 is multiplexed with RB3 in Extended Microcontroller, Microprocessor or Microprocessor with Boot Block mode. Or with RE7 in Microcontroller mode.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CCP2MUX = ON</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">CCP2 input/output is multiplexed with RC1.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG4L (address:0x300006, mask:0x85)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">STVR -- Stack Full/Underflow Reset Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">STVR = OFF</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">Stack full/underflow will not cause Reset.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">STVR = ON</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Stack full/underflow will cause Reset.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">LVP -- Low-Voltage ICSP Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">LVP = OFF</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">Low-voltage ICSP disabled.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">LVP = ON</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Low-voltage ICSP enabled.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">DEBUG -- Background Debugger Enable bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">DEBUG = ON</td> <td class="confSwValue">0x7F</td> <td class="confSwExpl">Background debugger enabled. RB6 and RB7 are dedicated to In-Circuit Debug.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">DEBUG = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Background debugger disabled. RB6 and RB7 configured as general purpose I/O pins.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG5L (address:0x300008, mask:0xFF)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CP0 -- Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP0 = ON</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">Block 0 (000200-003FFFh) code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP0 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 0 (000200-003FFFh) not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CP1 -- Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP1 = ON</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">Block 1 (004000-007FFFh) code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP1 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 1 (004000-007FFFh) not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CP2 -- Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP2 = ON</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP2 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CP3 -- Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP3 = ON</td> <td class="confSwValue">0xF7</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CP3 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG5H (address:0x300009, mask:0xC0)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CPB -- Boot Block Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CPB = ON</td> <td class="confSwValue">0xBF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CPB = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">CPD -- Data EEPROM Code Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">CPD = ON</td> <td class="confSwValue">0x7F</td> <td class="confSwExpl">Data EEPROM code-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">CPD = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Data EEPROM not code-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG6L (address:0x30000A, mask:0xFF)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRT0 -- Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT0 = ON</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">Block 0 (000200-003FFFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT0 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 0 (000200-003FFFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRT1 -- Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT1 = ON</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">Block 1 (004000-007FFFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT1 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 1 (004000-007FFFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRT2 -- Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT2 = ON</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT2 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRT3 -- Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT3 = ON</td> <td class="confSwValue">0xF7</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRT3 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG6H (address:0x30000B, mask:0xE0)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRTC -- Configuration Register Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTC = ON</td> <td class="confSwValue">0xDF</td> <td class="confSwExpl">Configuration registers (300000-3000FFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTC = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Configuration registers (300000-3000FFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRTB -- Boot Block Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTB = ON</td> <td class="confSwValue">0xBF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTB = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">WRTD -- Data EEPROM Write Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTD = ON</td> <td class="confSwValue">0x7F</td> <td class="confSwExpl">Data EEPROM write-protected.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">WRTD = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Data EEPROM not write-protected.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG7L (address:0x30000C, mask:0xFF)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">EBTR0 -- Table Read Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR0 = ON</td> <td class="confSwValue">0xFE</td> <td class="confSwExpl">Block 0 (000200-003FFFh) protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR0 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 0 (000200-003FFFh) not protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">EBTR1 -- Table Read Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR1 = ON</td> <td class="confSwValue">0xFD</td> <td class="confSwExpl">Block 1 (004000-007FFFh) protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR1 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 1 (004000-007FFFh) not protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">EBTR2 -- Table Read Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR2 = ON</td> <td class="confSwValue">0xFB</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR2 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">EBTR3 -- Table Read Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR3 = ON</td> <td class="confSwValue">0xF7</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTR3 = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr class="confGap"><td></td></tr> <tr><th colspan=4 class="configWord">CONFIG7H (address:0x30000D, mask:0x40)</th></tr> <tr class="confGap"><td></td></tr> <tr><th colspan=3 class="confOptName">EBTRB -- Boot Block Table Read Protection bit</th></tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTRB = ON</td> <td class="confSwValue">0xBF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> <tr> <td class="vMargin"></td> <td class="confSwName">EBTRB = OFF</td> <td class="confSwValue">0xFF</td> <td class="confSwExpl">Boot Block (000000-0001FFh) not protected from table reads executed in other blocks.</td> <td class="vMargin"></td> </tr> </table> <div class="legendContainer"> <p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:39 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p> </div> </body> </html>