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<table class="configList">
<tr><th colspan=5 class="confTableName">PIC18F4331</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG1H (address:0x300001, mask:0xCF)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">OSC -- Oscillator Selection bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = LP</td>
<td class="confSwValue">0xF0</td>
<td class="confSwExpl">LP oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = XT</td>
<td class="confSwValue">0xF1</td>
<td class="confSwExpl">XT oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = HS</td>
<td class="confSwValue">0xF2</td>
<td class="confSwExpl">HS oscillator.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = RC2</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">External RC oscillator, CLKO function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = EC</td>
<td class="confSwValue">0xF4</td>
<td class="confSwExpl">EC oscillator, CLKO function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = ECIO</td>
<td class="confSwValue">0xF5</td>
<td class="confSwExpl">EC oscillator, port function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = HSPLL</td>
<td class="confSwValue">0xF6</td>
<td class="confSwExpl">HS oscillator, PLL enabled (clock frequency = 4 x FOSC1).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = RCIO</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">External RC oscillator, port function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = IRCIO</td>
<td class="confSwValue">0xF8</td>
<td class="confSwExpl">Internal oscillator block, port function on RA6 and port function on RA7.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = IRC</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">Internal oscillator block, CLKO function on RA6 and port function on RA7.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = RC1</td>
<td class="confSwValue">0xFA</td>
<td class="confSwExpl">101X External RC oscillator, CLKO function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">OSC = RC</td>
<td class="confSwValue">0xFC</td>
<td class="confSwExpl">11XX External RC oscillator, CLKO function on RA6.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FCMEN -- Fail-Safe Clock Monitor Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = OFF</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FCMEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Fail-Safe Clock Monitor enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">IESO -- Internal External Oscillator Switchover bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = OFF</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Internal External Switchover mode disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">IESO = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Internal External Switchover mode enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2L (address:0x300002, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PWRTEN -- Power-up Timer Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWRTEN = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">PWRT enabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWRTEN = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PWRT disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BOREN -- Brown-out Reset Enable bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = OFF</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Brown-out Reset disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BOREN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Brown-out Reset enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">BORV -- Brown Out Reset Voltage bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 45</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">VBOR set to 4.5V.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 42</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">VBOR set to 4.2V.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 27</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">VBOR set to 2.7V.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">BORV = 20</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Reserved.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG2H (address:0x300003, mask:0x3F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDTEN -- Watchdog Timer Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = OFF</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">WDT disabled (control is placed on the SWDTEN bit).</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDTEN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">WDT enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WDPS -- Watchdog Timer Postscale Select bits</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 1</td>
<td class="confSwValue">0xE1</td>
<td class="confSwExpl">1:1.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 2</td>
<td class="confSwValue">0xE3</td>
<td class="confSwExpl">1:2.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 4</td>
<td class="confSwValue">0xE5</td>
<td class="confSwExpl">1:4.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 8</td>
<td class="confSwValue">0xE7</td>
<td class="confSwExpl">1:8.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 16</td>
<td class="confSwValue">0xE9</td>
<td class="confSwExpl">1:16.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 32</td>
<td class="confSwValue">0xEB</td>
<td class="confSwExpl">1:32.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 64</td>
<td class="confSwValue">0xED</td>
<td class="confSwExpl">1:64.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 128</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">1:128.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 256</td>
<td class="confSwValue">0xF1</td>
<td class="confSwExpl">1:256.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 512</td>
<td class="confSwValue">0xF3</td>
<td class="confSwExpl">1:512.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 1024</td>
<td class="confSwValue">0xF5</td>
<td class="confSwExpl">1:1024.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 2048</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">1:2048.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 4096</td>
<td class="confSwValue">0xF9</td>
<td class="confSwExpl">1:4096.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 8192</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">1:8192.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 16384</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">1:16384.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WDPS = 32768</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">1:32768.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WINEN -- Watchdog Timer Window Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WINEN = ON</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">WDT window enabledbled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WINEN = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">WDT window disabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG3L (address:0x300004, mask:0x3C)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PWMPIN -- PWM output pins Reset state control</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWMPIN = ON</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">PWM outputs drive active states upon Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWMPIN = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PWM outputs disabled upon Reset (default).</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">LPOL -- Low-Side Transistors Polarity</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LPOL = LOW</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">PWM0, 2, 4 and 6 are active-low.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LPOL = HIGH</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PWM0, 2, 4 and 6 are active-high.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">HPOL -- High-Side Transistors Polarity</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">HPOL = LOW</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">PWM1, 3, 5 and 7 are active-low.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">HPOL = HIGH</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PWM1, 3, 5 and 7 are active-high.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">T1OSCMX -- Timer1 Oscillator MUX</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T1OSCMX = OFF</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Standard (legacy) Timer1 oscillator operation.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">T1OSCMX = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Low-power Timer1 operation when microcontroller is in Sleep mode.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG3H (address:0x300005, mask:0x9D)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">FLTAMX -- FLTA MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FLTAMX = RD4</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">FLTA input is multiplexed with RD4.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">FLTAMX = RC1</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">FLTA input is multiplexed with RC1.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">SSPMX -- SSP I/O MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">SSPMX = RD1</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">SCK/SCL clocks and SDA/SDI data are multiplexed with RD3 and RD2, respectively. SDO output is multiplexed with RD1.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">SSPMX = RC7</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">PWM4MX -- PWM4 MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWM4MX = RD5</td>
<td class="confSwValue">0xF7</td>
<td class="confSwExpl">PWM4 output is multiplexed with RD5.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">PWM4MX = RB5</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">PWM4 output is multiplexed with RB5.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EXCLKMX -- TMR0/T5CKI External clock MUX bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EXCLKMX = RD0</td>
<td class="confSwValue">0xEF</td>
<td class="confSwExpl">TMR0/T5CKI external clock input is multiplexed with RD0.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EXCLKMX = RC3</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">TMR0/T5CKI external clock input is multiplexed with RC3.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">MCLRE -- MCLR Pin Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = OFF</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">MCLRE = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG4L (address:0x300006, mask:0x85)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">STVREN -- Stack Full/Underflow Reset Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = OFF</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Stack full/underflow will not cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">STVREN = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Stack full/underflow will cause Reset.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">LVP -- Low-Voltage ICSP Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = OFF</td>
<td class="confSwValue">0xFB</td>
<td class="confSwExpl">Low-voltage ICSP disabled.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">LVP = ON</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Low-voltage ICSP enabled.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">DEBUG -- Background Debugger Enable bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Background debugger enabled; RB6 and RB7 are dedicated to In-Circuit Debug.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">DEBUG = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Background debugger disabled; RB6 and RB7 configured as general purpose I/O pins.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5L (address:0x300008, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP0 -- Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CP1 -- Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (001000-001FFF) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CP1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (001000-001FFF) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG5H (address:0x300009, mask:0xC0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPB -- Boot Block Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">CPD -- Data EEPROM Code Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">CPD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM not code-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6L (address:0x30000A, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT0 -- Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRT1 -- Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (001000-001FFF) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRT1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (001000-001FFF) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG6H (address:0x30000B, mask:0xE0)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTC -- Configuration Register Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = ON</td>
<td class="confSwValue">0xDF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTC = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Configuration registers (300000-3000FFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTB -- Boot Block Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">WRTD -- Data EEPROM Write Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = ON</td>
<td class="confSwValue">0x7F</td>
<td class="confSwExpl">Data EEPROM write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">WRTD = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Data EEPROM not write-protected.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7L (address:0x30000C, mask:0x0F)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR0 -- Table Read Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = ON</td>
<td class="confSwValue">0xFE</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR0 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 0 (000200-000FFFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTR1 -- Table Read Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = ON</td>
<td class="confSwValue">0xFD</td>
<td class="confSwExpl">Block 1 (001000-001FFF) protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTR1 = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Block 1 (001000-001FFF) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=4 class="configWord">CONFIG7H (address:0x30000D, mask:0x40)</th></tr>
<tr class="confGap"><td></td></tr>
<tr><th colspan=3 class="confOptName">EBTRB -- Boot Block Table Read Protection bit</th></tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = ON</td>
<td class="confSwValue">0xBF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
<tr>
<td class="vMargin"></td>
<td class="confSwName">EBTRB = OFF</td>
<td class="confSwValue">0xFF</td>
<td class="confSwExpl">Boot Block (000000-0001FFh) not protected from table reads executed in other blocks.</td>
<td class="vMargin"></td>
</tr>
</table>
<div class="legendContainer">
<p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:39 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
</div>
</body>
</html>
distrib
>
Mageia
>
5
>
x86_64
>
media
>
core-release
>
by-pkgid
>
ea0480943e5f9837b0cc4165bae8d1c3
>
files
>
1437
