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gputils-1.2.0-4.mga5.x86_64.rpm

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    <table class="configList">
      <tr><th colspan=5 class="confTableName">PIC16LF721</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=4 class="configWord">CONFIG1 (address:0x2007, mask:0xFFFF)</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">FOSC -- Oscillator Selection bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = INTOSCIO</td>
        <td class="confSwValue">0x3FFC</td>
        <td class="confSwExpl">INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = INTOSCCLK</td>
        <td class="confSwValue">0x3FFD</td>
        <td class="confSwExpl">INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = ECIO</td>
        <td class="confSwValue">0x3FFE</td>
        <td class="confSwExpl">EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">FOSC = ECCLK</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">WDTE -- Watchdog Timer Enable bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WDTE = OFF</td>
        <td class="confSwValue">0x3FF7</td>
        <td class="confSwExpl">WDT disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WDTE = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">WDT enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">PWRTE -- Power-up Timer Enable bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PWRTE = ON</td>
        <td class="confSwValue">0x3FEF</td>
        <td class="confSwExpl">PWRT enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PWRTE = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">PWRT disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">MCLRE -- RA3/MCLR/VPP Pin Function Select bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">MCLRE = OFF</td>
        <td class="confSwValue">0x3FDF</td>
        <td class="confSwExpl">RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">MCLRE = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">CP -- Flash Program Memory Code Protection bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">CP = ON</td>
        <td class="confSwValue">0x3FBF</td>
        <td class="confSwExpl">0000h to 0FFFh code protection on.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">CP = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">Code protection off.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">BOREN -- Brown-out Reset Enable bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = OFF</td>
        <td class="confSwValue">0x3CFF</td>
        <td class="confSwExpl">Brown-out Reset disabled (Preconditioned State).</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = NSLEEP</td>
        <td class="confSwValue">0x3EFF</td>
        <td class="confSwExpl">Brown-out Reset enabled during operation and disabled in Sleep.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">BOREN = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">Brown-out Reset enabled.</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">PLLEN -- INTOSC PLLEN Enable Bit</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PLLEN = OFF</td>
        <td class="confSwValue">0x2FFF</td>
        <td class="confSwExpl">INTOSC Frequency is 500 kHz.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">PLLEN = ON</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">INTOSC Frequency is 16 MHz (32x).</td>
        <td class="vMargin"></td>
      </tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=4 class="configWord">CONFIG2 (address:0x2008, mask:0xFFFF)</th></tr>
      <tr class="confGap"><td></td></tr>
      <tr><th colspan=3 class="confOptName">WRTEN -- Flash memory self-write protection bits</th></tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WRTEN = FULL</td>
        <td class="confSwValue">0x3FFC</td>
        <td class="confSwExpl">0h to FFFh of flash memory write protected, no address may be modified.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WRTEN = HALF</td>
        <td class="confSwValue">0x3FFD</td>
        <td class="confSwExpl">0h to 7FFh of flash memory write protected, 800h to FFFh may be modified.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WRTEN = BOOT</td>
        <td class="confSwValue">0x3FFE</td>
        <td class="confSwExpl">0h to 1FFh of flash memory write protected, 200h to FFFh may be modified.</td>
        <td class="vMargin"></td>
      </tr>
      <tr>
        <td class="vMargin"></td>
        <td class="confSwName">WRTEN = OFF</td>
        <td class="confSwValue">0x3FFF</td>
        <td class="confSwExpl">Write protection off.</td>
        <td class="vMargin"></td>
      </tr>
    </table>
    <div class="legendContainer">
      <p class="srcInfo">This page generated automatically by the <a href="https://sourceforge.net/p/gputils/code/HEAD/tree/trunk/scripts/tools/device-help.pl"><em>device-help.pl</em></a> program (2013-05-17 07:55:35 UTC) from the <em>8bit_device.info</em> file (rev: 1.13) of <em>mpasmx</em> and from the <a href="http://gputils.sourceforge.net#Download">gputils</a> source package (rev: svn 979:980). The <em>mpasmx</em> is included in the <a href="http://www.microchip.com/pagehandler/en-us/family/mplabx">MPLAB X</a>.</p>
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