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kernel-vserver-3.4.69-1.mga2.src.rpm

From: James Ralston <james.d.ralston@intel.com>
Subject: [PATCH 4/5] lpc_ich: Add Device IDs for Intel Wellsburg PCH
Date: Fri,  8 Feb 2013 17:33:38 -0800

This patch adds the Watchdog Timer Device IDs for the Intel Wellsburg PCH

Signed-off-by: James Ralston <james.d.ralston@intel.com>

[ Adapted for kernel-3.4 where all of this is still in iTCO_wdt.c / tmb ]
Signed-off-by: Thomas Backlund <tmb@mageia.org>


 drivers/watchdog/iTCO_wdt.c |   35 +++++++++++++++++++++++++++++++++++
 1 file changed, 35 insertions(+)

--- linux-3.4/drivers/watchdog/iTCO_wdt.c.wbg	2013-02-17 00:16:52.889113999 +0200
+++ linux-3.4/drivers/watchdog/iTCO_wdt.c	2013-02-17 00:19:54.253191391 +0200
@@ -38,6 +38,7 @@
  *	document number TBD                   : Panther Point
  *	document number TBD                   : Lynx Point
  *	document number TBD                   : Lynx Point-LP
+ *	document number TBD                   : Wellsburg
  */
 
 /*
@@ -131,6 +132,7 @@ enum iTCO_chipsets {
 	TCO_PPT,	/* Panther Point */
 	TCO_LPT,	/* Lynx Point */
 	TCO_LPT_LP,	/* Lynx Point-LP */
+	TCO_WBG,	/* Wellsburg */
 };
 
 static struct {
@@ -196,6 +198,7 @@ static struct {
 	{"Panther Point", 2},
 	{"Lynx Point", 2},
 	{"Lynx Point-LP", 2},
+	{"Wellsburg", 2},
 	{NULL, 0}
 };
 
@@ -370,6 +373,38 @@ static DEFINE_PCI_DEVICE_TABLE(iTCO_wdt_
 	{ PCI_VDEVICE(INTEL, 0x8c5d), TCO_LPT},
 	{ PCI_VDEVICE(INTEL, 0x8c5e), TCO_LPT},
 	{ PCI_VDEVICE(INTEL, 0x8c5f), TCO_LPT},
+	{ PCI_VDEVICE(INTEL, 0x8d40), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d41), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d42), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d43), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d44), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d45), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d46), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d47), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d48), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d49), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4a), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4b), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4c), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4d), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4e), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d4f), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d50), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d51), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d52), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d53), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d54), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d55), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d56), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d57), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d58), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d59), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5a), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5b), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5c), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5d), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5e), TCO_WBG},
+	{ PCI_VDEVICE(INTEL, 0x8d5f), TCO_WBG},
 	{ PCI_VDEVICE(INTEL, 0x9c40), TCO_LPT_LP},
 	{ PCI_VDEVICE(INTEL, 0x9c41), TCO_LPT_LP},
 	{ PCI_VDEVICE(INTEL, 0x9c42), TCO_LPT_LP},