From: mchristi@redhat.com <mchristi@redhat.com>
Date: Wed, 13 May 2009 23:26:22 -0500
Subject: [net] cxgb3: update driver for RHEL-5.4
Message-id: 1242275184-23546-2-git-send-email-mchristi@redhat.com
O-Subject: [PATCH 2/4] RHEL 5.4: sync net cxgb3 driver with upstream
Bugzilla: 439518
RH-Acked-by: David Miller <davem@redhat.com>
RH-Acked-by: Neil Horman <nhorman@redhat.com>
From: Mike Christie <michaelc@cs.wisc.edu>
This is for BZ 439518.
This syncs the cxgb3 driver with upstream 2.6.30. I think it might include
two patches that are going to be sent for the net-next-2.6 tree. Chelsio
maintainer mentioned it in another bugzilla
https://bugzilla.redhat.com/show_bug.cgi?id=476301
but those patches were not in the final jumbo patch they sent us so I am
not 100% sure and I am still checking on it.
I have done some basic tests. I have run netperf to check for
regressions, and pulled cables and run iscsi over it and done
ifdown/ifups in a loop. I am not a netdev expert. I am sending
this update because the cxgb3i iSCSI driver depends on the cxgb3i
offload parts. I am relying on Chelsio and our partners like IBM
to do more indepth testing of the net functions.
diff --git a/drivers/net/cxgb3/adapter.h b/drivers/net/cxgb3/adapter.h
index d1130b8..277c5f9 100644
--- a/drivers/net/cxgb3/adapter.h
+++ b/drivers/net/cxgb3/adapter.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -42,18 +42,25 @@
#include <linux/cache.h>
#include <linux/mutex.h>
#include <linux/bitops.h>
+#include <linux/inet_lro.h>
#include "t3cdev.h"
#include <asm/io.h>
struct vlan_group;
struct adapter;
+
+
+enum { /* rx_offload flags */
+ T3_RX_CSUM = 1 << 0,
+ T3_LRO = 1 << 1,
+};
+
struct port_info {
struct adapter *adapter;
struct vlan_group *vlan_grp;
- const struct port_type_info *port_type;
u8 port_id;
- u8 rx_csum_offload;
+ u8 rx_offload;
u8 nqsets;
u8 first_qset;
struct cphy phy;
@@ -61,6 +68,9 @@ struct port_info {
struct link_config link_config;
struct net_device_stats netstats;
int activity;
+ __be32 iscsi_ipv4addr;
+
+ int link_fault; /* link fault was detected */
};
enum { /* adapter flags */
@@ -69,6 +79,7 @@ enum { /* adapter flags */
USING_MSIX = (1 << 2),
QUEUES_BOUND = (1 << 3),
TP_PARITY_INIT = (1 << 4),
+ NAPI_INIT = (1 << 5),
};
struct fl_pg_chunk {
@@ -83,6 +94,7 @@ struct rx_sw_desc;
struct sge_fl { /* SGE per free-buffer list state */
unsigned int buf_size; /* size of each Rx buffer */
unsigned int credits; /* # of available Rx buffers */
+ unsigned int pend_cred; /* new buffers since last FL DB ring */
unsigned int size; /* capacity of free list */
unsigned int cidx; /* consumer index */
unsigned int pidx; /* producer index */
@@ -170,17 +182,32 @@ enum { /* per port SGE statistics */
SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
+ SGE_PSTAT_LRO_AGGR, /* # of page chunks added to LRO sessions */
+ SGE_PSTAT_LRO_FLUSHED, /* # of flushed LRO sessions */
+ SGE_PSTAT_LRO_NO_DESC, /* # of overflown LRO sessions */
SGE_PSTAT_MAX /* must be last */
};
+#define T3_MAX_LRO_SES 8
+#define T3_MAX_LRO_MAX_PKTS 64
+
struct sge_qset { /* an SGE queue set */
+ struct adapter *adap;
struct sge_rspq rspq;
struct sge_fl fl[SGE_RXQ_PER_SET];
struct sge_txq txq[SGE_TXQ_PER_SET];
+ struct net_lro_mgr lro_mgr;
+ struct net_lro_desc lro_desc[T3_MAX_LRO_SES];
+ struct skb_frag_struct *lro_frag_tbl;
+ int lro_nfrags;
+ int lro_enabled;
+ int lro_frag_len;
+ void *lro_va;
struct net_device *netdev; /* associated net device */
unsigned long txq_stopped; /* which Tx queues are stopped */
struct timer_list tx_reclaim_timer; /* reclaims TX buffers */
+ struct timer_list rx_reclaim_timer; /* reclaims RX buffers */
unsigned long port_stats[SGE_PSTAT_MAX];
} ____cacheline_aligned;
@@ -206,6 +233,7 @@ struct adapter {
unsigned int slow_intr_mask;
unsigned long irq_stats[IRQ_NUM_STATS];
+ int msix_nvectors;
struct {
unsigned short vec;
char desc[22];
@@ -222,6 +250,8 @@ struct adapter {
unsigned int check_task_cnt;
struct delayed_work adap_check_task;
struct work_struct ext_intr_handler_task;
+ struct work_struct fatal_error_handler_task;
+ struct work_struct link_fault_handler_task;
/*
* Dummy netdevices are needed when using multiple receive queues with
@@ -275,9 +305,14 @@ int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
void t3_os_ext_intr_handler(struct adapter *adapter);
void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
int speed, int duplex, int fc);
+void t3_os_phymod_changed(struct adapter *adap, int port_id);
+void t3_os_link_fault(struct adapter *adapter, int port_id, int state);
+void t3_os_link_fault_handler(struct adapter *adapter, int port_id);
void t3_sge_start(struct adapter *adap);
void t3_sge_stop(struct adapter *adap);
+void t3_start_sge_timers(struct adapter *adap);
+void t3_stop_sge_timers(struct adapter *adap);
void t3_free_sge_resources(struct adapter *adap);
void t3_sge_err_intr_handler(struct adapter *adapter);
irq_handler_t t3_intr_handler(struct adapter *adap, int polling);
diff --git a/drivers/net/cxgb3/ael1002.c b/drivers/net/cxgb3/ael1002.c
index ee140e6..e1b2249 100644
--- a/drivers/net/cxgb3/ael1002.c
+++ b/drivers/net/cxgb3/ael1002.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -33,17 +33,57 @@
#include "regs.h"
enum {
+ PMD_RSD = 10, /* PMA/PMD receive signal detect register */
+ PCS_STAT1_X = 24, /* 10GBASE-X PCS status 1 register */
+ PCS_STAT1_R = 32, /* 10GBASE-R PCS status 1 register */
+ XS_LN_STAT = 24 /* XS lane status register */
+};
+
+enum {
AEL100X_TX_DISABLE = 9,
AEL100X_TX_CONFIG1 = 0xc002,
AEL1002_PWR_DOWN_HI = 0xc011,
AEL1002_PWR_DOWN_LO = 0xc012,
AEL1002_XFI_EQL = 0xc015,
AEL1002_LB_EN = 0xc017,
+ AEL_OPT_SETTINGS = 0xc017,
+ AEL_I2C_CTRL = 0xc30a,
+ AEL_I2C_DATA = 0xc30b,
+ AEL_I2C_STAT = 0xc30c,
+ AEL2005_GPIO_CTRL = 0xc214,
+ AEL2005_GPIO_STAT = 0xc215,
+};
+
+enum { edc_none, edc_sr, edc_twinax };
- LASI_CTRL = 0x9002,
- LASI_STAT = 0x9005
+/* PHY module I2C device address */
+#define MODULE_DEV_ADDR 0xa0
+
+#define AEL2005_MODDET_IRQ 4
+
+struct reg_val {
+ unsigned short mmd_addr;
+ unsigned short reg_addr;
+ unsigned short clear_bits;
+ unsigned short set_bits;
};
+static int set_phy_regs(struct cphy *phy, const struct reg_val *rv)
+{
+ int err;
+
+ for (err = 0; rv->mmd_addr && !err; rv++) {
+ if (rv->clear_bits == 0xffff)
+ err = mdio_write(phy, rv->mmd_addr, rv->reg_addr,
+ rv->set_bits);
+ else
+ err = t3_mdio_change_bits(phy, rv->mmd_addr,
+ rv->reg_addr, rv->clear_bits,
+ rv->set_bits);
+ }
+ return err;
+}
+
static void ael100x_txon(struct cphy *phy)
{
int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
@@ -84,23 +124,23 @@ static int ael1002_intr_noop(struct cphy *phy)
return 0;
}
-static int ael100x_get_link_status(struct cphy *phy, int *link_ok,
- int *speed, int *duplex, int *fc)
+/*
+ * Get link status for a 10GBASE-R device.
+ */
+static int get_link_status_r(struct cphy *phy, int *link_ok, int *speed,
+ int *duplex, int *fc)
{
if (link_ok) {
- unsigned int status;
- int err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &status);
-
- /*
- * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
- * once more to get the current link state.
- */
- if (!err && !(status & BMSR_LSTATUS))
- err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR,
- &status);
+ unsigned int stat0, stat1, stat2;
+ int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);
+
+ if (!err)
+ err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_R, &stat1);
+ if (!err)
+ err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);
if (err)
return err;
- *link_ok = !!(status & BMSR_LSTATUS);
+ *link_ok = (stat0 & stat1 & (stat2 >> 12)) & 1;
}
if (speed)
*speed = SPEED_10000;
@@ -115,15 +155,18 @@ static struct cphy_ops ael1002_ops = {
.intr_disable = ael1002_intr_noop,
.intr_clear = ael1002_intr_noop,
.intr_handler = ael1002_intr_noop,
- .get_link_status = ael100x_get_link_status,
+ .get_link_status = get_link_status_r,
.power_down = ael1002_power_down,
};
-void t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops)
+int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
- cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops);
+ cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops,
+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
+ "10GBASE-R");
ael100x_txon(phy);
+ return 0;
}
static int ael1006_reset(struct cphy *phy, int wait)
@@ -131,72 +174,986 @@ static int ael1006_reset(struct cphy *phy, int wait)
return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
}
-static int ael1006_intr_enable(struct cphy *phy)
+static int ael1006_power_down(struct cphy *phy, int enable)
{
- return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
+ return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
+ BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
}
-static int ael1006_intr_disable(struct cphy *phy)
+static struct cphy_ops ael1006_ops = {
+ .reset = ael1006_reset,
+ .intr_enable = t3_phy_lasi_intr_enable,
+ .intr_disable = t3_phy_lasi_intr_disable,
+ .intr_clear = t3_phy_lasi_intr_clear,
+ .intr_handler = t3_phy_lasi_intr_handler,
+ .get_link_status = get_link_status_r,
+ .power_down = ael1006_power_down,
+};
+
+int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
- return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
+ cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops,
+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
+ "10GBASE-SR");
+ ael100x_txon(phy);
+ return 0;
}
-static int ael1006_intr_clear(struct cphy *phy)
+static int ael2005_setup_sr_edc(struct cphy *phy)
{
- u32 val;
+ static struct reg_val regs[] = {
+ { MDIO_DEV_PMA_PMD, 0xc003, 0xffff, 0x181 },
+ { MDIO_DEV_PMA_PMD, 0xc010, 0xffff, 0x448a },
+ { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5200 },
+ { 0, 0, 0, 0 }
+ };
+ static u16 sr_edc[] = {
+ 0xcc00, 0x2ff4,
+ 0xcc01, 0x3cd4,
+ 0xcc02, 0x2015,
+ 0xcc03, 0x3105,
+ 0xcc04, 0x6524,
+ 0xcc05, 0x27ff,
+ 0xcc06, 0x300f,
+ 0xcc07, 0x2c8b,
+ 0xcc08, 0x300b,
+ 0xcc09, 0x4009,
+ 0xcc0a, 0x400e,
+ 0xcc0b, 0x2f72,
+ 0xcc0c, 0x3002,
+ 0xcc0d, 0x1002,
+ 0xcc0e, 0x2172,
+ 0xcc0f, 0x3012,
+ 0xcc10, 0x1002,
+ 0xcc11, 0x25d2,
+ 0xcc12, 0x3012,
+ 0xcc13, 0x1002,
+ 0xcc14, 0xd01e,
+ 0xcc15, 0x27d2,
+ 0xcc16, 0x3012,
+ 0xcc17, 0x1002,
+ 0xcc18, 0x2004,
+ 0xcc19, 0x3c84,
+ 0xcc1a, 0x6436,
+ 0xcc1b, 0x2007,
+ 0xcc1c, 0x3f87,
+ 0xcc1d, 0x8676,
+ 0xcc1e, 0x40b7,
+ 0xcc1f, 0xa746,
+ 0xcc20, 0x4047,
+ 0xcc21, 0x5673,
+ 0xcc22, 0x2982,
+ 0xcc23, 0x3002,
+ 0xcc24, 0x13d2,
+ 0xcc25, 0x8bbd,
+ 0xcc26, 0x2862,
+ 0xcc27, 0x3012,
+ 0xcc28, 0x1002,
+ 0xcc29, 0x2092,
+ 0xcc2a, 0x3012,
+ 0xcc2b, 0x1002,
+ 0xcc2c, 0x5cc3,
+ 0xcc2d, 0x314,
+ 0xcc2e, 0x2942,
+ 0xcc2f, 0x3002,
+ 0xcc30, 0x1002,
+ 0xcc31, 0xd019,
+ 0xcc32, 0x2032,
+ 0xcc33, 0x3012,
+ 0xcc34, 0x1002,
+ 0xcc35, 0x2a04,
+ 0xcc36, 0x3c74,
+ 0xcc37, 0x6435,
+ 0xcc38, 0x2fa4,
+ 0xcc39, 0x3cd4,
+ 0xcc3a, 0x6624,
+ 0xcc3b, 0x5563,
+ 0xcc3c, 0x2d42,
+ 0xcc3d, 0x3002,
+ 0xcc3e, 0x13d2,
+ 0xcc3f, 0x464d,
+ 0xcc40, 0x2862,
+ 0xcc41, 0x3012,
+ 0xcc42, 0x1002,
+ 0xcc43, 0x2032,
+ 0xcc44, 0x3012,
+ 0xcc45, 0x1002,
+ 0xcc46, 0x2fb4,
+ 0xcc47, 0x3cd4,
+ 0xcc48, 0x6624,
+ 0xcc49, 0x5563,
+ 0xcc4a, 0x2d42,
+ 0xcc4b, 0x3002,
+ 0xcc4c, 0x13d2,
+ 0xcc4d, 0x2ed2,
+ 0xcc4e, 0x3002,
+ 0xcc4f, 0x1002,
+ 0xcc50, 0x2fd2,
+ 0xcc51, 0x3002,
+ 0xcc52, 0x1002,
+ 0xcc53, 0x004,
+ 0xcc54, 0x2942,
+ 0xcc55, 0x3002,
+ 0xcc56, 0x1002,
+ 0xcc57, 0x2092,
+ 0xcc58, 0x3012,
+ 0xcc59, 0x1002,
+ 0xcc5a, 0x5cc3,
+ 0xcc5b, 0x317,
+ 0xcc5c, 0x2f72,
+ 0xcc5d, 0x3002,
+ 0xcc5e, 0x1002,
+ 0xcc5f, 0x2942,
+ 0xcc60, 0x3002,
+ 0xcc61, 0x1002,
+ 0xcc62, 0x22cd,
+ 0xcc63, 0x301d,
+ 0xcc64, 0x2862,
+ 0xcc65, 0x3012,
+ 0xcc66, 0x1002,
+ 0xcc67, 0x2ed2,
+ 0xcc68, 0x3002,
+ 0xcc69, 0x1002,
+ 0xcc6a, 0x2d72,
+ 0xcc6b, 0x3002,
+ 0xcc6c, 0x1002,
+ 0xcc6d, 0x628f,
+ 0xcc6e, 0x2112,
+ 0xcc6f, 0x3012,
+ 0xcc70, 0x1002,
+ 0xcc71, 0x5aa3,
+ 0xcc72, 0x2dc2,
+ 0xcc73, 0x3002,
+ 0xcc74, 0x1312,
+ 0xcc75, 0x6f72,
+ 0xcc76, 0x1002,
+ 0xcc77, 0x2807,
+ 0xcc78, 0x31a7,
+ 0xcc79, 0x20c4,
+ 0xcc7a, 0x3c24,
+ 0xcc7b, 0x6724,
+ 0xcc7c, 0x1002,
+ 0xcc7d, 0x2807,
+ 0xcc7e, 0x3187,
+ 0xcc7f, 0x20c4,
+ 0xcc80, 0x3c24,
+ 0xcc81, 0x6724,
+ 0xcc82, 0x1002,
+ 0xcc83, 0x2514,
+ 0xcc84, 0x3c64,
+ 0xcc85, 0x6436,
+ 0xcc86, 0xdff4,
+ 0xcc87, 0x6436,
+ 0xcc88, 0x1002,
+ 0xcc89, 0x40a4,
+ 0xcc8a, 0x643c,
+ 0xcc8b, 0x4016,
+ 0xcc8c, 0x8c6c,
+ 0xcc8d, 0x2b24,
+ 0xcc8e, 0x3c24,
+ 0xcc8f, 0x6435,
+ 0xcc90, 0x1002,
+ 0xcc91, 0x2b24,
+ 0xcc92, 0x3c24,
+ 0xcc93, 0x643a,
+ 0xcc94, 0x4025,
+ 0xcc95, 0x8a5a,
+ 0xcc96, 0x1002,
+ 0xcc97, 0x2731,
+ 0xcc98, 0x3011,
+ 0xcc99, 0x1001,
+ 0xcc9a, 0xc7a0,
+ 0xcc9b, 0x100,
+ 0xcc9c, 0xc502,
+ 0xcc9d, 0x53ac,
+ 0xcc9e, 0xc503,
+ 0xcc9f, 0xd5d5,
+ 0xcca0, 0xc600,
+ 0xcca1, 0x2a6d,
+ 0xcca2, 0xc601,
+ 0xcca3, 0x2a4c,
+ 0xcca4, 0xc602,
+ 0xcca5, 0x111,
+ 0xcca6, 0xc60c,
+ 0xcca7, 0x5900,
+ 0xcca8, 0xc710,
+ 0xcca9, 0x700,
+ 0xccaa, 0xc718,
+ 0xccab, 0x700,
+ 0xccac, 0xc720,
+ 0xccad, 0x4700,
+ 0xccae, 0xc801,
+ 0xccaf, 0x7f50,
+ 0xccb0, 0xc802,
+ 0xccb1, 0x7760,
+ 0xccb2, 0xc803,
+ 0xccb3, 0x7fce,
+ 0xccb4, 0xc804,
+ 0xccb5, 0x5700,
+ 0xccb6, 0xc805,
+ 0xccb7, 0x5f11,
+ 0xccb8, 0xc806,
+ 0xccb9, 0x4751,
+ 0xccba, 0xc807,
+ 0xccbb, 0x57e1,
+ 0xccbc, 0xc808,
+ 0xccbd, 0x2700,
+ 0xccbe, 0xc809,
+ 0xccbf, 0x000,
+ 0xccc0, 0xc821,
+ 0xccc1, 0x002,
+ 0xccc2, 0xc822,
+ 0xccc3, 0x014,
+ 0xccc4, 0xc832,
+ 0xccc5, 0x1186,
+ 0xccc6, 0xc847,
+ 0xccc7, 0x1e02,
+ 0xccc8, 0xc013,
+ 0xccc9, 0xf341,
+ 0xccca, 0xc01a,
+ 0xcccb, 0x446,
+ 0xcccc, 0xc024,
+ 0xcccd, 0x1000,
+ 0xccce, 0xc025,
+ 0xcccf, 0xa00,
+ 0xccd0, 0xc026,
+ 0xccd1, 0xc0c,
+ 0xccd2, 0xc027,
+ 0xccd3, 0xc0c,
+ 0xccd4, 0xc029,
+ 0xccd5, 0x0a0,
+ 0xccd6, 0xc030,
+ 0xccd7, 0xa00,
+ 0xccd8, 0xc03c,
+ 0xccd9, 0x01c,
+ 0xccda, 0xc005,
+ 0xccdb, 0x7a06,
+ 0xccdc, 0x000,
+ 0xccdd, 0x2731,
+ 0xccde, 0x3011,
+ 0xccdf, 0x1001,
+ 0xcce0, 0xc620,
+ 0xcce1, 0x000,
+ 0xcce2, 0xc621,
+ 0xcce3, 0x03f,
+ 0xcce4, 0xc622,
+ 0xcce5, 0x000,
+ 0xcce6, 0xc623,
+ 0xcce7, 0x000,
+ 0xcce8, 0xc624,
+ 0xcce9, 0x000,
+ 0xccea, 0xc625,
+ 0xcceb, 0x000,
+ 0xccec, 0xc627,
+ 0xcced, 0x000,
+ 0xccee, 0xc628,
+ 0xccef, 0x000,
+ 0xccf0, 0xc62c,
+ 0xccf1, 0x000,
+ 0xccf2, 0x000,
+ 0xccf3, 0x2806,
+ 0xccf4, 0x3cb6,
+ 0xccf5, 0xc161,
+ 0xccf6, 0x6134,
+ 0xccf7, 0x6135,
+ 0xccf8, 0x5443,
+ 0xccf9, 0x303,
+ 0xccfa, 0x6524,
+ 0xccfb, 0x00b,
+ 0xccfc, 0x1002,
+ 0xccfd, 0x2104,
+ 0xccfe, 0x3c24,
+ 0xccff, 0x2105,
+ 0xcd00, 0x3805,
+ 0xcd01, 0x6524,
+ 0xcd02, 0xdff4,
+ 0xcd03, 0x4005,
+ 0xcd04, 0x6524,
+ 0xcd05, 0x1002,
+ 0xcd06, 0x5dd3,
+ 0xcd07, 0x306,
+ 0xcd08, 0x2ff7,
+ 0xcd09, 0x38f7,
+ 0xcd0a, 0x60b7,
+ 0xcd0b, 0xdffd,
+ 0xcd0c, 0x00a,
+ 0xcd0d, 0x1002,
+ 0xcd0e, 0
+ };
+ int i, err;
+
+ err = set_phy_regs(phy, regs);
+ if (err)
+ return err;
- return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
+ msleep(50);
+
+ for (i = 0; i < ARRAY_SIZE(sr_edc) && !err; i += 2)
+ err = mdio_write(phy, MDIO_DEV_PMA_PMD, sr_edc[i],
+ sr_edc[i + 1]);
+ if (!err)
+ phy->priv = edc_sr;
+ return err;
}
-static int ael1006_intr_handler(struct cphy *phy)
+static int ael2005_setup_twinax_edc(struct cphy *phy, int modtype)
{
- unsigned int status;
- int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status);
+ static struct reg_val regs[] = {
+ { MDIO_DEV_PMA_PMD, 0xc04a, 0xffff, 0x5a00 },
+ { 0, 0, 0, 0 }
+ };
+ static struct reg_val preemphasis[] = {
+ { MDIO_DEV_PMA_PMD, 0xc014, 0xffff, 0xfe16 },
+ { MDIO_DEV_PMA_PMD, 0xc015, 0xffff, 0xa000 },
+ { 0, 0, 0, 0 }
+ };
+ static u16 twinax_edc[] = {
+ 0xcc00, 0x4009,
+ 0xcc01, 0x27ff,
+ 0xcc02, 0x300f,
+ 0xcc03, 0x40aa,
+ 0xcc04, 0x401c,
+ 0xcc05, 0x401e,
+ 0xcc06, 0x2ff4,
+ 0xcc07, 0x3cd4,
+ 0xcc08, 0x2035,
+ 0xcc09, 0x3145,
+ 0xcc0a, 0x6524,
+ 0xcc0b, 0x26a2,
+ 0xcc0c, 0x3012,
+ 0xcc0d, 0x1002,
+ 0xcc0e, 0x29c2,
+ 0xcc0f, 0x3002,
+ 0xcc10, 0x1002,
+ 0xcc11, 0x2072,
+ 0xcc12, 0x3012,
+ 0xcc13, 0x1002,
+ 0xcc14, 0x22cd,
+ 0xcc15, 0x301d,
+ 0xcc16, 0x2e52,
+ 0xcc17, 0x3012,
+ 0xcc18, 0x1002,
+ 0xcc19, 0x28e2,
+ 0xcc1a, 0x3002,
+ 0xcc1b, 0x1002,
+ 0xcc1c, 0x628f,
+ 0xcc1d, 0x2ac2,
+ 0xcc1e, 0x3012,
+ 0xcc1f, 0x1002,
+ 0xcc20, 0x5553,
+ 0xcc21, 0x2ae2,
+ 0xcc22, 0x3002,
+ 0xcc23, 0x1302,
+ 0xcc24, 0x401e,
+ 0xcc25, 0x2be2,
+ 0xcc26, 0x3012,
+ 0xcc27, 0x1002,
+ 0xcc28, 0x2da2,
+ 0xcc29, 0x3012,
+ 0xcc2a, 0x1002,
+ 0xcc2b, 0x2ba2,
+ 0xcc2c, 0x3002,
+ 0xcc2d, 0x1002,
+ 0xcc2e, 0x5ee3,
+ 0xcc2f, 0x305,
+ 0xcc30, 0x400e,
+ 0xcc31, 0x2bc2,
+ 0xcc32, 0x3002,
+ 0xcc33, 0x1002,
+ 0xcc34, 0x2b82,
+ 0xcc35, 0x3012,
+ 0xcc36, 0x1002,
+ 0xcc37, 0x5663,
+ 0xcc38, 0x302,
+ 0xcc39, 0x401e,
+ 0xcc3a, 0x6f72,
+ 0xcc3b, 0x1002,
+ 0xcc3c, 0x628f,
+ 0xcc3d, 0x2be2,
+ 0xcc3e, 0x3012,
+ 0xcc3f, 0x1002,
+ 0xcc40, 0x22cd,
+ 0xcc41, 0x301d,
+ 0xcc42, 0x2e52,
+ 0xcc43, 0x3012,
+ 0xcc44, 0x1002,
+ 0xcc45, 0x2522,
+ 0xcc46, 0x3012,
+ 0xcc47, 0x1002,
+ 0xcc48, 0x2da2,
+ 0xcc49, 0x3012,
+ 0xcc4a, 0x1002,
+ 0xcc4b, 0x2ca2,
+ 0xcc4c, 0x3012,
+ 0xcc4d, 0x1002,
+ 0xcc4e, 0x2fa4,
+ 0xcc4f, 0x3cd4,
+ 0xcc50, 0x6624,
+ 0xcc51, 0x410b,
+ 0xcc52, 0x56b3,
+ 0xcc53, 0x3c4,
+ 0xcc54, 0x2fb2,
+ 0xcc55, 0x3002,
+ 0xcc56, 0x1002,
+ 0xcc57, 0x220b,
+ 0xcc58, 0x303b,
+ 0xcc59, 0x56b3,
+ 0xcc5a, 0x3c3,
+ 0xcc5b, 0x866b,
+ 0xcc5c, 0x400c,
+ 0xcc5d, 0x23a2,
+ 0xcc5e, 0x3012,
+ 0xcc5f, 0x1002,
+ 0xcc60, 0x2da2,
+ 0xcc61, 0x3012,
+ 0xcc62, 0x1002,
+ 0xcc63, 0x2ca2,
+ 0xcc64, 0x3012,
+ 0xcc65, 0x1002,
+ 0xcc66, 0x2fb4,
+ 0xcc67, 0x3cd4,
+ 0xcc68, 0x6624,
+ 0xcc69, 0x56b3,
+ 0xcc6a, 0x3c3,
+ 0xcc6b, 0x866b,
+ 0xcc6c, 0x401c,
+ 0xcc6d, 0x2205,
+ 0xcc6e, 0x3035,
+ 0xcc6f, 0x5b53,
+ 0xcc70, 0x2c52,
+ 0xcc71, 0x3002,
+ 0xcc72, 0x13c2,
+ 0xcc73, 0x5cc3,
+ 0xcc74, 0x317,
+ 0xcc75, 0x2522,
+ 0xcc76, 0x3012,
+ 0xcc77, 0x1002,
+ 0xcc78, 0x2da2,
+ 0xcc79, 0x3012,
+ 0xcc7a, 0x1002,
+ 0xcc7b, 0x2b82,
+ 0xcc7c, 0x3012,
+ 0xcc7d, 0x1002,
+ 0xcc7e, 0x5663,
+ 0xcc7f, 0x303,
+ 0xcc80, 0x401e,
+ 0xcc81, 0x004,
+ 0xcc82, 0x2c42,
+ 0xcc83, 0x3012,
+ 0xcc84, 0x1002,
+ 0xcc85, 0x6f72,
+ 0xcc86, 0x1002,
+ 0xcc87, 0x628f,
+ 0xcc88, 0x2304,
+ 0xcc89, 0x3c84,
+ 0xcc8a, 0x6436,
+ 0xcc8b, 0xdff4,
+ 0xcc8c, 0x6436,
+ 0xcc8d, 0x2ff5,
+ 0xcc8e, 0x3005,
+ 0xcc8f, 0x8656,
+ 0xcc90, 0xdfba,
+ 0xcc91, 0x56a3,
+ 0xcc92, 0xd05a,
+ 0xcc93, 0x21c2,
+ 0xcc94, 0x3012,
+ 0xcc95, 0x1392,
+ 0xcc96, 0xd05a,
+ 0xcc97, 0x56a3,
+ 0xcc98, 0xdfba,
+ 0xcc99, 0x383,
+ 0xcc9a, 0x6f72,
+ 0xcc9b, 0x1002,
+ 0xcc9c, 0x28c5,
+ 0xcc9d, 0x3005,
+ 0xcc9e, 0x4178,
+ 0xcc9f, 0x5653,
+ 0xcca0, 0x384,
+ 0xcca1, 0x22b2,
+ 0xcca2, 0x3012,
+ 0xcca3, 0x1002,
+ 0xcca4, 0x2be5,
+ 0xcca5, 0x3005,
+ 0xcca6, 0x41e8,
+ 0xcca7, 0x5653,
+ 0xcca8, 0x382,
+ 0xcca9, 0x002,
+ 0xccaa, 0x4258,
+ 0xccab, 0x2474,
+ 0xccac, 0x3c84,
+ 0xccad, 0x6437,
+ 0xccae, 0xdff4,
+ 0xccaf, 0x6437,
+ 0xccb0, 0x2ff5,
+ 0xccb1, 0x3c05,
+ 0xccb2, 0x8757,
+ 0xccb3, 0xb888,
+ 0xccb4, 0x9787,
+ 0xccb5, 0xdff4,
+ 0xccb6, 0x6724,
+ 0xccb7, 0x866a,
+ 0xccb8, 0x6f72,
+ 0xccb9, 0x1002,
+ 0xccba, 0x2d01,
+ 0xccbb, 0x3011,
+ 0xccbc, 0x1001,
+ 0xccbd, 0xc620,
+ 0xccbe, 0x14e5,
+ 0xccbf, 0xc621,
+ 0xccc0, 0xc53d,
+ 0xccc1, 0xc622,
+ 0xccc2, 0x3cbe,
+ 0xccc3, 0xc623,
+ 0xccc4, 0x4452,
+ 0xccc5, 0xc624,
+ 0xccc6, 0xc5c5,
+ 0xccc7, 0xc625,
+ 0xccc8, 0xe01e,
+ 0xccc9, 0xc627,
+ 0xccca, 0x000,
+ 0xcccb, 0xc628,
+ 0xcccc, 0x000,
+ 0xcccd, 0xc62b,
+ 0xccce, 0x000,
+ 0xcccf, 0xc62c,
+ 0xccd0, 0x000,
+ 0xccd1, 0x000,
+ 0xccd2, 0x2d01,
+ 0xccd3, 0x3011,
+ 0xccd4, 0x1001,
+ 0xccd5, 0xc620,
+ 0xccd6, 0x000,
+ 0xccd7, 0xc621,
+ 0xccd8, 0x000,
+ 0xccd9, 0xc622,
+ 0xccda, 0x0ce,
+ 0xccdb, 0xc623,
+ 0xccdc, 0x07f,
+ 0xccdd, 0xc624,
+ 0xccde, 0x032,
+ 0xccdf, 0xc625,
+ 0xcce0, 0x000,
+ 0xcce1, 0xc627,
+ 0xcce2, 0x000,
+ 0xcce3, 0xc628,
+ 0xcce4, 0x000,
+ 0xcce5, 0xc62b,
+ 0xcce6, 0x000,
+ 0xcce7, 0xc62c,
+ 0xcce8, 0x000,
+ 0xcce9, 0x000,
+ 0xccea, 0x2d01,
+ 0xcceb, 0x3011,
+ 0xccec, 0x1001,
+ 0xcced, 0xc502,
+ 0xccee, 0x609f,
+ 0xccef, 0xc600,
+ 0xccf0, 0x2a6e,
+ 0xccf1, 0xc601,
+ 0xccf2, 0x2a2c,
+ 0xccf3, 0xc60c,
+ 0xccf4, 0x5400,
+ 0xccf5, 0xc710,
+ 0xccf6, 0x700,
+ 0xccf7, 0xc718,
+ 0xccf8, 0x700,
+ 0xccf9, 0xc720,
+ 0xccfa, 0x4700,
+ 0xccfb, 0xc728,
+ 0xccfc, 0x700,
+ 0xccfd, 0xc729,
+ 0xccfe, 0x1207,
+ 0xccff, 0xc801,
+ 0xcd00, 0x7f50,
+ 0xcd01, 0xc802,
+ 0xcd02, 0x7760,
+ 0xcd03, 0xc803,
+ 0xcd04, 0x7fce,
+ 0xcd05, 0xc804,
+ 0xcd06, 0x520e,
+ 0xcd07, 0xc805,
+ 0xcd08, 0x5c11,
+ 0xcd09, 0xc806,
+ 0xcd0a, 0x3c51,
+ 0xcd0b, 0xc807,
+ 0xcd0c, 0x4061,
+ 0xcd0d, 0xc808,
+ 0xcd0e, 0x49c1,
+ 0xcd0f, 0xc809,
+ 0xcd10, 0x3840,
+ 0xcd11, 0xc80a,
+ 0xcd12, 0x000,
+ 0xcd13, 0xc821,
+ 0xcd14, 0x002,
+ 0xcd15, 0xc822,
+ 0xcd16, 0x046,
+ 0xcd17, 0xc844,
+ 0xcd18, 0x182f,
+ 0xcd19, 0xc013,
+ 0xcd1a, 0xf341,
+ 0xcd1b, 0xc01a,
+ 0xcd1c, 0x446,
+ 0xcd1d, 0xc024,
+ 0xcd1e, 0x1000,
+ 0xcd1f, 0xc025,
+ 0xcd20, 0xa00,
+ 0xcd21, 0xc026,
+ 0xcd22, 0xc0c,
+ 0xcd23, 0xc027,
+ 0xcd24, 0xc0c,
+ 0xcd25, 0xc029,
+ 0xcd26, 0x0a0,
+ 0xcd27, 0xc030,
+ 0xcd28, 0xa00,
+ 0xcd29, 0xc03c,
+ 0xcd2a, 0x01c,
+ 0xcd2b, 0x000,
+ 0xcd2c, 0x2b84,
+ 0xcd2d, 0x3c74,
+ 0xcd2e, 0x6435,
+ 0xcd2f, 0xdff4,
+ 0xcd30, 0x6435,
+ 0xcd31, 0x2806,
+ 0xcd32, 0x3006,
+ 0xcd33, 0x8565,
+ 0xcd34, 0x2b24,
+ 0xcd35, 0x3c24,
+ 0xcd36, 0x6436,
+ 0xcd37, 0x1002,
+ 0xcd38, 0x2b24,
+ 0xcd39, 0x3c24,
+ 0xcd3a, 0x6436,
+ 0xcd3b, 0x4045,
+ 0xcd3c, 0x8656,
+ 0xcd3d, 0x1002,
+ 0xcd3e, 0x2807,
+ 0xcd3f, 0x31a7,
+ 0xcd40, 0x20c4,
+ 0xcd41, 0x3c24,
+ 0xcd42, 0x6724,
+ 0xcd43, 0x1002,
+ 0xcd44, 0x2807,
+ 0xcd45, 0x3187,
+ 0xcd46, 0x20c4,
+ 0xcd47, 0x3c24,
+ 0xcd48, 0x6724,
+ 0xcd49, 0x1002,
+ 0xcd4a, 0x2514,
+ 0xcd4b, 0x3c64,
+ 0xcd4c, 0x6436,
+ 0xcd4d, 0xdff4,
+ 0xcd4e, 0x6436,
+ 0xcd4f, 0x1002,
+ 0xcd50, 0x2806,
+ 0xcd51, 0x3cb6,
+ 0xcd52, 0xc161,
+ 0xcd53, 0x6134,
+ 0xcd54, 0x6135,
+ 0xcd55, 0x5443,
+ 0xcd56, 0x303,
+ 0xcd57, 0x6524,
+ 0xcd58, 0x00b,
+ 0xcd59, 0x1002,
+ 0xcd5a, 0xd019,
+ 0xcd5b, 0x2104,
+ 0xcd5c, 0x3c24,
+ 0xcd5d, 0x2105,
+ 0xcd5e, 0x3805,
+ 0xcd5f, 0x6524,
+ 0xcd60, 0xdff4,
+ 0xcd61, 0x4005,
+ 0xcd62, 0x6524,
+ 0xcd63, 0x2e8d,
+ 0xcd64, 0x303d,
+ 0xcd65, 0x5dd3,
+ 0xcd66, 0x306,
+ 0xcd67, 0x2ff7,
+ 0xcd68, 0x38f7,
+ 0xcd69, 0x60b7,
+ 0xcd6a, 0xdffd,
+ 0xcd6b, 0x00a,
+ 0xcd6c, 0x1002,
+ 0xcd6d, 0
+ };
+ int i, err;
+ err = set_phy_regs(phy, regs);
+ if (!err && modtype == phy_modtype_twinax_long)
+ err = set_phy_regs(phy, preemphasis);
if (err)
return err;
- return (status & 1) ? cphy_cause_link_change : 0;
+
+ msleep(50);
+
+ for (i = 0; i < ARRAY_SIZE(twinax_edc) && !err; i += 2)
+ err = mdio_write(phy, MDIO_DEV_PMA_PMD, twinax_edc[i],
+ twinax_edc[i + 1]);
+ if (!err)
+ phy->priv = edc_twinax;
+ return err;
}
-static int ael1006_power_down(struct cphy *phy, int enable)
+static int ael2005_i2c_rd(struct cphy *phy, int dev_addr, int word_addr)
{
- return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
- BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
+ int i, err;
+ unsigned int stat, data;
+
+ err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL_I2C_CTRL,
+ (dev_addr << 8) | (1 << 8) | word_addr);
+ if (err)
+ return err;
+
+ for (i = 0; i < 5; i++) {
+ msleep(1);
+ err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_STAT, &stat);
+ if (err)
+ return err;
+ if ((stat & 3) == 1) {
+ err = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL_I2C_DATA,
+ &data);
+ if (err)
+ return err;
+ return data >> 8;
+ }
+ }
+ CH_WARN(phy->adapter, "PHY %u I2C read of addr %u timed out\n",
+ phy->addr, word_addr);
+ return -ETIMEDOUT;
}
-static struct cphy_ops ael1006_ops = {
- .reset = ael1006_reset,
- .intr_enable = ael1006_intr_enable,
- .intr_disable = ael1006_intr_disable,
- .intr_clear = ael1006_intr_clear,
- .intr_handler = ael1006_intr_handler,
- .get_link_status = ael100x_get_link_status,
- .power_down = ael1006_power_down,
+static int get_module_type(struct cphy *phy, int delay_ms)
+{
+ int v;
+ unsigned int stat;
+
+ v = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, &stat);
+ if (v)
+ return v;
+
+ if (stat & (1 << 8)) /* module absent */
+ return phy_modtype_none;
+
+ if (delay_ms)
+ msleep(delay_ms);
+
+ /* see SFF-8472 for below */
+ v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 3);
+ if (v < 0)
+ return v;
+
+ if (v == 0x10)
+ return phy_modtype_sr;
+ if (v == 0x20)
+ return phy_modtype_lr;
+ if (v == 0x40)
+ return phy_modtype_lrm;
+
+ v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 6);
+ if (v < 0)
+ return v;
+ if (v != 4)
+ goto unknown;
+
+ v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 10);
+ if (v < 0)
+ return v;
+
+ if (v & 0x80) {
+ v = ael2005_i2c_rd(phy, MODULE_DEV_ADDR, 0x12);
+ if (v < 0)
+ return v;
+ return v > 10 ? phy_modtype_twinax_long : phy_modtype_twinax;
+ }
+unknown:
+ return phy_modtype_unknown;
+}
+
+static int ael2005_intr_enable(struct cphy *phy)
+{
+ int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x200);
+ return err ? err : t3_phy_lasi_intr_enable(phy);
+}
+
+static int ael2005_intr_disable(struct cphy *phy)
+{
+ int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0x100);
+ return err ? err : t3_phy_lasi_intr_disable(phy);
+}
+
+static int ael2005_intr_clear(struct cphy *phy)
+{
+ int err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL, 0xd00);
+ return err ? err : t3_phy_lasi_intr_clear(phy);
+}
+
+static int ael2005_reset(struct cphy *phy, int wait)
+{
+ static struct reg_val regs0[] = {
+ { MDIO_DEV_PMA_PMD, 0xc001, 0, 1 << 5 },
+ { MDIO_DEV_PMA_PMD, 0xc017, 0, 1 << 5 },
+ { MDIO_DEV_PMA_PMD, 0xc013, 0xffff, 0xf341 },
+ { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 },
+ { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8100 },
+ { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0x8000 },
+ { MDIO_DEV_PMA_PMD, 0xc210, 0xffff, 0 },
+ { 0, 0, 0, 0 }
+ };
+ static struct reg_val regs1[] = {
+ { MDIO_DEV_PMA_PMD, 0xca00, 0xffff, 0x0080 },
+ { MDIO_DEV_PMA_PMD, 0xca12, 0xffff, 0 },
+ { 0, 0, 0, 0 }
+ };
+
+ int err;
+ unsigned int lasi_ctrl;
+
+ err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, &lasi_ctrl);
+ if (err)
+ return err;
+
+ err = t3_phy_reset(phy, MDIO_DEV_PMA_PMD, 0);
+ if (err)
+ return err;
+
+ msleep(125);
+ phy->priv = edc_none;
+ err = set_phy_regs(phy, regs0);
+ if (err)
+ return err;
+
+ msleep(50);
+
+ err = get_module_type(phy, 0);
+ if (err < 0)
+ return err;
+ phy->modtype = err;
+
+ if (err == phy_modtype_twinax || err == phy_modtype_twinax_long)
+ err = ael2005_setup_twinax_edc(phy, err);
+ else
+ err = ael2005_setup_sr_edc(phy);
+ if (err)
+ return err;
+
+ err = set_phy_regs(phy, regs1);
+ if (err)
+ return err;
+
+ /* reset wipes out interrupts, reenable them if they were on */
+ if (lasi_ctrl & 1)
+ err = ael2005_intr_enable(phy);
+ return err;
+}
+
+static int ael2005_intr_handler(struct cphy *phy)
+{
+ unsigned int stat;
+ int ret, edc_needed, cause = 0;
+
+ ret = mdio_read(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_STAT, &stat);
+ if (ret)
+ return ret;
+
+ if (stat & AEL2005_MODDET_IRQ) {
+ ret = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL2005_GPIO_CTRL,
+ 0xd00);
+ if (ret)
+ return ret;
+
+ /* modules have max 300 ms init time after hot plug */
+ ret = get_module_type(phy, 300);
+ if (ret < 0)
+ return ret;
+
+ phy->modtype = ret;
+ if (ret == phy_modtype_none)
+ edc_needed = phy->priv; /* on unplug retain EDC */
+ else if (ret == phy_modtype_twinax ||
+ ret == phy_modtype_twinax_long)
+ edc_needed = edc_twinax;
+ else
+ edc_needed = edc_sr;
+
+ if (edc_needed != phy->priv) {
+ ret = ael2005_reset(phy, 0);
+ return ret ? ret : cphy_cause_module_change;
+ }
+ cause = cphy_cause_module_change;
+ }
+
+ ret = t3_phy_lasi_intr_handler(phy);
+ if (ret < 0)
+ return ret;
+
+ ret |= cause;
+ return ret ? ret : cphy_cause_link_change;
+}
+
+static struct cphy_ops ael2005_ops = {
+ .reset = ael2005_reset,
+ .intr_enable = ael2005_intr_enable,
+ .intr_disable = ael2005_intr_disable,
+ .intr_clear = ael2005_intr_clear,
+ .intr_handler = ael2005_intr_handler,
+ .get_link_status = get_link_status_r,
+ .power_down = ael1002_power_down,
};
-void t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops)
+int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
- cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops);
- ael100x_txon(phy);
+ cphy_init(phy, adapter, phy_addr, &ael2005_ops, mdio_ops,
+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE |
+ SUPPORTED_IRQ, "10GBASE-R");
+ msleep(125);
+ return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL_OPT_SETTINGS, 0,
+ 1 << 5);
+}
+
+/*
+ * Get link status for a 10GBASE-X device.
+ */
+static int get_link_status_x(struct cphy *phy, int *link_ok, int *speed,
+ int *duplex, int *fc)
+{
+ if (link_ok) {
+ unsigned int stat0, stat1, stat2;
+ int err = mdio_read(phy, MDIO_DEV_PMA_PMD, PMD_RSD, &stat0);
+
+ if (!err)
+ err = mdio_read(phy, MDIO_DEV_PCS, PCS_STAT1_X, &stat1);
+ if (!err)
+ err = mdio_read(phy, MDIO_DEV_XGXS, XS_LN_STAT, &stat2);
+ if (err)
+ return err;
+ *link_ok = (stat0 & (stat1 >> 12) & (stat2 >> 12)) & 1;
+ }
+ if (speed)
+ *speed = SPEED_10000;
+ if (duplex)
+ *duplex = DUPLEX_FULL;
+ return 0;
}
static struct cphy_ops qt2045_ops = {
.reset = ael1006_reset,
- .intr_enable = ael1006_intr_enable,
- .intr_disable = ael1006_intr_disable,
- .intr_clear = ael1006_intr_clear,
- .intr_handler = ael1006_intr_handler,
- .get_link_status = ael100x_get_link_status,
+ .intr_enable = t3_phy_lasi_intr_enable,
+ .intr_disable = t3_phy_lasi_intr_disable,
+ .intr_clear = t3_phy_lasi_intr_clear,
+ .intr_handler = t3_phy_lasi_intr_handler,
+ .get_link_status = get_link_status_x,
.power_down = ael1006_power_down,
};
-void t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops)
+int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
unsigned int stat;
- cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops);
+ cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops,
+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
+ "10GBASE-CX4");
/*
* Some cards where the PHY is supposed to be at address 0 actually
@@ -205,6 +1162,7 @@ void t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) &&
stat == 0xffff)
phy->addr = 1;
+ return 0;
}
static int xaui_direct_reset(struct cphy *phy, int wait)
@@ -250,8 +1208,11 @@ static struct cphy_ops xaui_direct_ops = {
.power_down = xaui_direct_power_down,
};
-void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops)
+int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
- cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);
+ cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops,
+ SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
+ "10GBASE-CX4");
+ return 0;
}
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h
index d7f064c..e508dc3 100644
--- a/drivers/net/cxgb3/common.h
+++ b/drivers/net/cxgb3/common.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -191,24 +191,16 @@ struct mdio_ops {
};
struct adapter_info {
- unsigned char nports; /* # of ports */
+ unsigned char nports0; /* # of ports on channel 0 */
+ unsigned char nports1; /* # of ports on channel 1 */
unsigned char phy_base_addr; /* MDIO PHY base address */
- unsigned char mdien;
- unsigned char mdiinv;
unsigned int gpio_out; /* GPIO output settings */
- unsigned int gpio_intr; /* GPIO IRQ enable mask */
+ unsigned char gpio_intr[MAX_NPORTS]; /* GPIO PHY IRQ pins */
unsigned long caps; /* adapter capabilities */
const struct mdio_ops *mdio_ops; /* MDIO operations */
const char *desc; /* product description */
};
-struct port_type_info {
- void (*phy_prep)(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *ops);
- unsigned int caps;
- const char *desc;
-};
-
struct mc5_stats {
unsigned long parity_err;
unsigned long active_rgn_full;
@@ -289,6 +281,7 @@ struct mac_stats {
unsigned long num_toggled; /* # times toggled TxEn due to stuck TX */
unsigned long num_resets; /* # times reset due to stuck TX */
+ unsigned long link_faults; /* # detected link faults */
};
struct tp_mib_stats {
@@ -351,12 +344,14 @@ struct tp_params {
struct qset_params { /* SGE queue set parameters */
unsigned int polling; /* polling/interrupt service for rspq */
+ unsigned int lro; /* large receive offload */
unsigned int coalesce_usecs; /* irq coalescing timer */
unsigned int rspq_size; /* # of entries in response queue */
unsigned int fl_size; /* # of entries in regular free list */
unsigned int jumbo_size; /* # of entries in jumbo free list */
unsigned int txq_size[SGE_TXQ_PER_SET]; /* Tx queue sizes */
unsigned int cong_thres; /* FL congestion threshold */
+ unsigned int vector; /* Interrupt (line or vector) number */
};
struct sge_params {
@@ -428,6 +423,7 @@ struct adapter_params {
unsigned short b_wnd[NCCTRL_WIN];
unsigned int nports; /* # of ethernet ports */
+ unsigned int chan_map; /* bitmap of in-use Tx channels */
unsigned int stats_update_period; /* MAC stats accumulation period */
unsigned int linkpoll_period; /* link poll period in 0.1s */
unsigned int rev; /* chip revision */
@@ -524,12 +520,25 @@ enum {
MAC_RXFIFO_SIZE = 32768
};
-/* IEEE 802.3ae specified MDIO devices */
+/* IEEE 802.3 specified MDIO devices */
enum {
MDIO_DEV_PMA_PMD = 1,
MDIO_DEV_WIS = 2,
MDIO_DEV_PCS = 3,
- MDIO_DEV_XGXS = 4
+ MDIO_DEV_XGXS = 4,
+ MDIO_DEV_ANEG = 7,
+ MDIO_DEV_VEND1 = 30,
+ MDIO_DEV_VEND2 = 31
+};
+
+/* LASI control and status registers */
+enum {
+ RX_ALARM_CTRL = 0x9000,
+ TX_ALARM_CTRL = 0x9001,
+ LASI_CTRL = 0x9002,
+ RX_ALARM_STAT = 0x9003,
+ TX_ALARM_STAT = 0x9004,
+ LASI_STAT = 0x9005
};
/* PHY loopback direction */
@@ -541,12 +550,23 @@ enum {
/* PHY interrupt types */
enum {
cphy_cause_link_change = 1,
- cphy_cause_fifo_error = 2
+ cphy_cause_fifo_error = 2,
+ cphy_cause_module_change = 4,
+};
+
+/* PHY module types */
+enum {
+ phy_modtype_none,
+ phy_modtype_sr,
+ phy_modtype_lr,
+ phy_modtype_lrm,
+ phy_modtype_twinax,
+ phy_modtype_twinax_long,
+ phy_modtype_unknown
};
/* PHY operations */
struct cphy_ops {
- void (*destroy)(struct cphy *phy);
int (*reset)(struct cphy *phy, int wait);
int (*intr_enable)(struct cphy *phy);
@@ -567,8 +587,12 @@ struct cphy_ops {
/* A PHY instance */
struct cphy {
- int addr; /* PHY address */
+ u8 addr; /* PHY address */
+ u8 modtype; /* PHY module type */
+ short priv; /* scratch pad */
+ unsigned int caps; /* PHY capabilities */
struct adapter *adapter; /* associated adapter */
+ const char *desc; /* PHY description */
unsigned long fifo_errors; /* FIFO over/under-flows */
const struct cphy_ops *ops; /* PHY operations */
int (*mdio_read)(struct adapter *adapter, int phy_addr, int mmd_addr,
@@ -593,10 +617,13 @@ static inline int mdio_write(struct cphy *phy, int mmd, int reg,
/* Convenience initializer */
static inline void cphy_init(struct cphy *phy, struct adapter *adapter,
int phy_addr, struct cphy_ops *phy_ops,
- const struct mdio_ops *mdio_ops)
+ const struct mdio_ops *mdio_ops,
+ unsigned int caps, const char *desc)
{
- phy->adapter = adapter;
phy->addr = phy_addr;
+ phy->caps = caps;
+ phy->adapter = adapter;
+ phy->desc = desc;
phy->ops = phy_ops;
if (mdio_ops) {
phy->mdio_read = mdio_ops->read;
@@ -667,11 +694,18 @@ int t3_mdio_change_bits(struct cphy *phy, int mmd, int reg, unsigned int clear,
unsigned int set);
int t3_phy_reset(struct cphy *phy, int mmd, int wait);
int t3_phy_advertise(struct cphy *phy, unsigned int advert);
+int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert);
int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex);
+int t3_phy_lasi_intr_enable(struct cphy *phy);
+int t3_phy_lasi_intr_disable(struct cphy *phy);
+int t3_phy_lasi_intr_clear(struct cphy *phy);
+int t3_phy_lasi_intr_handler(struct cphy *phy);
void t3_intr_enable(struct adapter *adapter);
void t3_intr_disable(struct adapter *adapter);
void t3_intr_clear(struct adapter *adapter);
+void t3_xgm_intr_enable(struct adapter *adapter, int idx);
+void t3_xgm_intr_disable(struct adapter *adapter, int idx);
void t3_port_intr_enable(struct adapter *adapter, int idx);
void t3_port_intr_disable(struct adapter *adapter, int idx);
void t3_port_intr_clear(struct adapter *adapter, int idx);
@@ -679,13 +713,14 @@ int t3_slow_intr_handler(struct adapter *adapter);
int t3_phy_intr_handler(struct adapter *adapter);
void t3_link_changed(struct adapter *adapter, int port_id);
+void t3_link_fault(struct adapter *adapter, int port_id);
int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
const struct adapter_info *t3_get_adapter_info(unsigned int board_id);
int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data);
int t3_seeprom_write(struct adapter *adapter, u32 addr, __le32 data);
int t3_seeprom_wp(struct adapter *adapter, int enable);
int t3_get_tp_version(struct adapter *adapter, u32 *vers);
-int t3_check_tpsram_version(struct adapter *adapter, int *must_load);
+int t3_check_tpsram_version(struct adapter *adapter);
int t3_check_tpsram(struct adapter *adapter, const u8 *tp_ram,
unsigned int size);
int t3_set_proto_sram(struct adapter *adap, const u8 *data);
@@ -693,12 +728,14 @@ int t3_read_flash(struct adapter *adapter, unsigned int addr,
unsigned int nwords, u32 *data, int byte_oriented);
int t3_load_fw(struct adapter *adapter, const u8 * fw_data, unsigned int size);
int t3_get_fw_version(struct adapter *adapter, u32 *vers);
-int t3_check_fw_version(struct adapter *adapter, int *must_load);
+int t3_check_fw_version(struct adapter *adapter);
int t3_init_hw(struct adapter *adapter, u32 fw_params);
void mac_prep(struct cmac *mac, struct adapter *adapter, int index);
void early_hw_init(struct adapter *adapter, const struct adapter_info *ai);
+int t3_reset_adapter(struct adapter *adapter);
int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
int reset);
+int t3_replay_prep_adapter(struct adapter *adapter);
void t3_led_ready(struct adapter *adapter);
void t3_fatal_err(struct adapter *adapter);
void t3_set_vlan_accel(struct adapter *adapter, unsigned int ports, int on);
@@ -713,6 +750,8 @@ int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
int t3_mac_reset(struct cmac *mac);
void t3b_pcs_reset(struct cmac *mac);
+void t3_mac_disable_exact_filters(struct cmac *mac);
+void t3_mac_enable_exact_filters(struct cmac *mac);
int t3_mac_enable(struct cmac *mac, int which);
int t3_mac_disable(struct cmac *mac, int which);
int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu);
@@ -772,14 +811,16 @@ int t3_sge_read_rspq(struct adapter *adapter, unsigned int id, u32 data[4]);
int t3_sge_cqcntxt_op(struct adapter *adapter, unsigned int id, unsigned int op,
unsigned int credits);
-void t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops);
-void t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops);
-void t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops);
-void t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
- const struct mdio_ops *mdio_ops);
-void t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops);
+int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops);
+int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops);
+int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops);
+int t3_ael2005_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops);
+int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
+ const struct mdio_ops *mdio_ops);
+int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops);
#endif /* __CHELSIO_COMMON_H */
diff --git a/drivers/net/cxgb3/cxgb3_ctl_defs.h b/drivers/net/cxgb3/cxgb3_ctl_defs.h
index 6ad9240..369fe71 100644
--- a/drivers/net/cxgb3/cxgb3_ctl_defs.h
+++ b/drivers/net/cxgb3/cxgb3_ctl_defs.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -57,6 +57,9 @@ enum {
RDMA_GET_MIB = 19,
GET_RX_PAGE_INFO = 50,
+ GET_ISCSI_IPV4ADDR = 51,
+
+ GET_EMBEDDED_INFO = 70,
};
/*
@@ -86,6 +89,12 @@ struct iff_mac {
u16 vlan_tag;
};
+/* Structure used to request a port's iSCSI IPv4 address */
+struct iscsi_ipv4addr {
+ struct net_device *dev; /* the net_device */
+ __be32 ipv4addr; /* the return iSCSI IPv4 address */
+};
+
struct pci_dev;
/*
@@ -169,4 +178,12 @@ struct ofld_page_info {
unsigned int page_size; /* Page size, should be a power of 2 */
unsigned int num; /* Number of pages */
};
+
+/*
+ * Structure used to get firmware and protocol engine versions.
+ */
+struct ch_embedded_info {
+ u32 fw_vers;
+ u32 tp_vers;
+};
#endif /* _CXGB3_OFFLOAD_CTL_DEFS_H */
diff --git a/drivers/net/cxgb3/cxgb3_defs.h b/drivers/net/cxgb3/cxgb3_defs.h
index 45e9216..47e5376 100644
--- a/drivers/net/cxgb3/cxgb3_defs.h
+++ b/drivers/net/cxgb3/cxgb3_defs.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2006-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/cxgb3_ioctl.h b/drivers/net/cxgb3/cxgb3_ioctl.h
index 0a82fcd..b19e437 100644
--- a/drivers/net/cxgb3/cxgb3_ioctl.h
+++ b/drivers/net/cxgb3/cxgb3_ioctl.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -90,7 +90,10 @@ struct ch_qset_params {
int32_t fl_size[2];
int32_t intr_lat;
int32_t polling;
+ int32_t lro;
int32_t cong_thres;
+ int32_t vector;
+ int32_t qnum;
};
struct ch_pktsched_params {
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 219e7ae..d93a563 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -55,6 +55,7 @@
#include "cxgb3_ctl_defs.h"
#include "t3_cpl.h"
#include "firmware_exports.h"
+#include "t3_firmware.h"
enum {
MAX_TXQ_ENTRIES = 16384,
@@ -92,6 +93,7 @@ static const struct pci_device_id cxgb3_pci_tbl[] = {
CH_DEVICE(0x30, 2), /* T3B10 */
CH_DEVICE(0x31, 3), /* T3B20 */
CH_DEVICE(0x32, 1), /* T3B02 */
+ CH_DEVICE(0x35, 6), /* T3C20-derived T3C10 */
{0,}
};
@@ -171,6 +173,40 @@ static void link_report(struct net_device *dev)
}
}
+void t3_os_link_fault(struct adapter *adap, int port_id, int state)
+{
+ struct net_device *dev = adap->port[port_id];
+ struct port_info *pi = netdev_priv(dev);
+
+ if (state == netif_carrier_ok(dev))
+ return;
+
+ if (state) {
+ struct cmac *mac = &pi->mac;
+
+ netif_carrier_on(dev);
+
+ /* Clear local faults */
+ t3_xgm_intr_disable(adap, pi->port_id);
+ t3_read_reg(adap, A_XGM_INT_STATUS +
+ pi->mac.offset);
+ t3_write_reg(adap,
+ A_XGM_INT_CAUSE + pi->mac.offset,
+ F_XGM_INT);
+
+ t3_set_reg_field(adap,
+ A_XGM_INT_ENABLE +
+ pi->mac.offset,
+ F_XGM_INT, F_XGM_INT);
+ t3_xgm_intr_enable(adap, pi->port_id);
+
+ t3_mac_enable(mac, MAC_DIRECTION_TX);
+ } else
+ netif_carrier_off(dev);
+
+ link_report(dev);
+}
+
/**
* t3_os_link_changed - handle link status changes
* @adapter: the adapter associated with the link change
@@ -198,10 +234,34 @@ void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat,
if (link_stat != netif_carrier_ok(dev)) {
if (link_stat) {
t3_mac_enable(mac, MAC_DIRECTION_RX);
+
+ /* Clear local faults */
+ t3_xgm_intr_disable(adapter, pi->port_id);
+ t3_read_reg(adapter, A_XGM_INT_STATUS +
+ pi->mac.offset);
+ t3_write_reg(adapter,
+ A_XGM_INT_CAUSE + pi->mac.offset,
+ F_XGM_INT);
+
+ t3_set_reg_field(adapter,
+ A_XGM_INT_ENABLE + pi->mac.offset,
+ F_XGM_INT, F_XGM_INT);
+ t3_xgm_intr_enable(adapter, pi->port_id);
+
netif_carrier_on(dev);
} else {
netif_carrier_off(dev);
- pi->phy.ops->power_down(&pi->phy, 1);
+
+ t3_xgm_intr_disable(adapter, pi->port_id);
+ t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
+ t3_set_reg_field(adapter,
+ A_XGM_INT_ENABLE + pi->mac.offset,
+ F_XGM_INT, 0);
+
+ if (is_10G(adapter))
+ pi->phy.ops->power_down(&pi->phy, 1);
+
+ t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
t3_mac_disable(mac, MAC_DIRECTION_RX);
t3_link_start(&pi->phy, mac, &pi->link_config);
}
@@ -210,6 +270,31 @@ void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat,
}
}
+/**
+ * t3_os_phymod_changed - handle PHY module changes
+ * @phy: the PHY reporting the module change
+ * @mod_type: new module type
+ *
+ * This is the OS-dependent handler for PHY module changes. It is
+ * invoked when a PHY module is removed or inserted for any OS-specific
+ * processing.
+ */
+void t3_os_phymod_changed(struct adapter *adap, int port_id)
+{
+ static const char *mod_str[] = {
+ NULL, "SR", "LR", "LRM", "TWINAX", "TWINAX", "unknown"
+ };
+
+ const struct net_device *dev = adap->port[port_id];
+ const struct port_info *pi = netdev_priv(dev);
+
+ if (pi->phy.modtype == phy_modtype_none)
+ printk(KERN_INFO "%s: PHY module unplugged\n", dev->name);
+ else
+ printk(KERN_INFO "%s: %s PHY module inserted\n", dev->name,
+ mod_str[pi->phy.modtype]);
+}
+
static void cxgb_set_rxmode(struct net_device *dev)
{
struct t3_rx_mode rm;
@@ -276,10 +361,10 @@ static void name_msix_vecs(struct adapter *adap)
for (i = 0; i < pi->nqsets; i++, msi_idx++) {
snprintf(adap->msix_info[msi_idx].desc, n,
- "%s (queue %d)", d->name, i);
+ "%s-%d", d->name, pi->first_qset + i);
adap->msix_info[msi_idx].desc[n] = 0;
}
- }
+ }
}
static int request_msix_data_irqs(struct adapter *adap)
@@ -308,6 +393,22 @@ static int request_msix_data_irqs(struct adapter *adap)
return 0;
}
+static void free_irq_resources(struct adapter *adapter)
+{
+ if (adapter->flags & USING_MSIX) {
+ int i, n = 0;
+
+ free_irq(adapter->msix_info[0].vec, adapter);
+ for_each_port(adapter, i)
+ n += adap2pinfo(adapter, i)->nqsets;
+
+ for (i = 0; i < n; ++i)
+ free_irq(adapter->msix_info[i + 1].vec,
+ &adapter->sge.qs[i]);
+ } else
+ free_irq(adapter->pdev->irq, adapter);
+}
+
static int await_mgmt_replies(struct adapter *adap, unsigned long init_cnt,
unsigned long n)
{
@@ -439,6 +540,7 @@ static int init_dummy_netdevs(struct adapter *adap)
p = netdev_priv(nd);
p->adapter = adap;
+ p->port_id = pi->port_id;
nd->weight = 64;
set_bit(__LINK_STATE_START, &nd->state);
adap->dummy_netdev[dummy_idx] = nd;
@@ -446,6 +548,11 @@ static int init_dummy_netdevs(struct adapter *adap)
strcpy(adap->dummy_netdev[dummy_idx]->name, dev->name);
dummy_idx++;
}
+ /*
+ * Be careful not to call init_dummy_netdevs a second
+ * time, e.g., during EEH recovery, by making a note of
+ * it here */
+ adap->flags |= NAPI_INIT;
}
return 0;
@@ -501,12 +608,15 @@ static int setup_sge_qsets(struct adapter *adap)
struct net_device *dev = adap->port[i];
const struct port_info *pi = netdev_priv(dev);
- for (j = 0; j < pi->nqsets; ++j, ++qset_idx) {
+ for (j = pi->first_qset; j < pi->first_qset + pi->nqsets;
+ ++j, ++qset_idx) {
+ if (!(pi->rx_offload & T3_LRO))
+ adap->params.sge.qset[qset_idx].lro = 0;
err = t3_sge_alloc_qset(adap, qset_idx, 1,
(adap->flags & USING_MSIX) ? qset_idx + 1 :
irq_idx,
&adap->params.sge.qset[qset_idx], ntxq,
- j == 0 ? dev :
+ j == pi->first_qset ? dev :
adap-> dummy_netdev[dummy_dev_idx++]);
if (err) {
t3_free_sge_resources(adap);
@@ -765,11 +875,12 @@ static void init_port_mtus(struct adapter *adapter)
t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus);
}
-static void send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
+static int send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
int hi, int port)
{
struct sk_buff *skb;
struct mngt_pktsched_wr *req;
+ int ret;
skb = alloc_skb(sizeof(*req), GFP_KERNEL | __GFP_NOFAIL);
req = (struct mngt_pktsched_wr *)skb_put(skb, sizeof(*req));
@@ -780,22 +891,49 @@ static void send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo,
req->min = lo;
req->max = hi;
req->binding = port;
- t3_mgmt_tx(adap, skb);
+ ret = t3_mgmt_tx(adap, skb);
+
+ return ret;
}
-static void bind_qsets(struct adapter *adap)
+static int bind_qsets(struct adapter *adap)
{
- int i, j;
+ int i, j, err = 0;
for_each_port(adap, i) {
const struct port_info *pi = adap2pinfo(adap, i);
- for (j = 0; j < pi->nqsets; ++j)
- send_pktsched_cmd(adap, 1, pi->first_qset + j, -1,
- -1, i);
+ for (j = 0; j < pi->nqsets; ++j) {
+ int ret = send_pktsched_cmd(adap, 1,
+ pi->first_qset + j, -1,
+ -1, i);
+ if (ret)
+ err = ret;
+ }
}
+
+ return err;
}
+static void t3_release_firmware(const struct firmware *fw)
+{
+ if (!t3_local_firmware_free(fw))
+ return;
+ release_firmware(fw);
+}
+
+static int t3_request_firmware(const struct firmware **firmware, const char *name,
+ struct device *dev)
+{
+ /* first check if there is firmware on the filesystem */
+ if (!request_firmware(firmware, name, dev)) {
+ return 0;
+ }
+
+ return t3_local_firmware_load(firmware, name);
+}
+
+
#define FW_FNAME "t3fw-%d.%d.%d.bin"
#define TPSRAM_NAME "t3%c_protocol_sram-%d.%d.%d.bin"
@@ -808,14 +946,14 @@ static int upgrade_fw(struct adapter *adap)
snprintf(buf, sizeof(buf), FW_FNAME, FW_VERSION_MAJOR,
FW_VERSION_MINOR, FW_VERSION_MICRO);
- ret = request_firmware(&fw, buf, dev);
+ ret = t3_request_firmware(&fw, buf, dev);
if (ret < 0) {
dev_err(dev, "could not upgrade firmware: unable to load %s\n",
buf);
return ret;
}
ret = t3_load_fw(adap, fw->data, fw->size);
- release_firmware(fw);
+ t3_release_firmware(fw);
if (ret == 0)
dev_info(dev, "successful upgrade to firmware %d.%d.%d\n",
@@ -858,7 +996,7 @@ static int update_tpsram(struct adapter *adap)
snprintf(buf, sizeof(buf), TPSRAM_NAME, rev,
TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO);
- ret = request_firmware(&tpsram, buf, dev);
+ ret = t3_request_firmware(&tpsram, buf, dev);
if (ret < 0) {
dev_err(dev, "could not load TP SRAM: unable to load %s\n",
buf);
@@ -882,7 +1020,7 @@ static int update_tpsram(struct adapter *adap)
dev_err(dev, "loading protocol SRAM failed\n");
release_tpsram:
- release_firmware(tpsram);
+ t3_release_firmware(tpsram);
return ret;
}
@@ -900,26 +1038,36 @@ release_tpsram:
static int cxgb_up(struct adapter *adap)
{
int err;
- int must_load;
if (!(adap->flags & FULL_INIT_DONE)) {
- err = t3_check_fw_version(adap, &must_load);
+ err = t3_check_fw_version(adap);
if (err == -EINVAL) {
err = upgrade_fw(adap);
- if (err && must_load)
- goto out;
+ CH_WARN(adap, "FW upgrade to %d.%d.%d %s\n",
+ FW_VERSION_MAJOR, FW_VERSION_MINOR,
+ FW_VERSION_MICRO, err ? "failed" : "succeeded");
}
- err = t3_check_tpsram_version(adap, &must_load);
+ err = t3_check_tpsram_version(adap);
if (err == -EINVAL) {
err = update_tpsram(adap);
- if (err && must_load)
- goto out;
+ CH_WARN(adap, "TP upgrade to %d.%d.%d %s\n",
+ TP_VERSION_MAJOR, TP_VERSION_MINOR,
+ TP_VERSION_MICRO, err ? "failed" : "succeeded");
+ }
+
+ if (!(adap->flags & NAPI_INIT)) {
+ err = init_dummy_netdevs(adap);
+ if (err)
+ goto out;
}
- err = init_dummy_netdevs(adap);
- if (err)
- goto out;
+ /*
+ * Clear interrupts now to catch errors if t3_init_hw fails.
+ * We clear them again later as initialization may trigger
+ * conditions that can interrupt.
+ */
+ t3_intr_clear(adap);
err = t3_init_hw(adap, 0);
if (err)
@@ -933,6 +1081,7 @@ static int cxgb_up(struct adapter *adap)
goto out;
setup_rss(adap);
+ t3_start_sge_timers(adap);
adap->flags |= FULL_INIT_DONE;
}
@@ -973,9 +1122,16 @@ static int cxgb_up(struct adapter *adap)
t3_write_reg(adap, A_TP_INT_ENABLE, 0x7fbfffff);
}
- if ((adap->flags & (USING_MSIX | QUEUES_BOUND)) == USING_MSIX)
- bind_qsets(adap);
- adap->flags |= QUEUES_BOUND;
+ if (!(adap->flags & QUEUES_BOUND)) {
+ err = bind_qsets(adap);
+ if (err) {
+ CH_ERR(adap, "failed to bind qsets, err %d\n", err);
+ t3_intr_disable(adap);
+ free_irq_resources(adap);
+ goto out;
+ }
+ adap->flags |= QUEUES_BOUND;
+ }
out:
return err;
@@ -994,21 +1150,9 @@ static void cxgb_down(struct adapter *adapter)
t3_intr_disable(adapter);
spin_unlock_irq(&adapter->work_lock);
- if (adapter->flags & USING_MSIX) {
- int i, n = 0;
-
- free_irq(adapter->msix_info[0].vec, adapter);
- for_each_port(adapter, i)
- n += adap2pinfo(adapter, i)->nqsets;
-
- for (i = 0; i < n; ++i)
- free_irq(adapter->msix_info[i + 1].vec,
- &adapter->sge.qs[i]);
- } else
- free_irq(adapter->pdev->irq, adapter);
-
- flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */
+ free_irq_resources(adapter);
quiesce_rx(adapter);
+ flush_workqueue(cxgb3_wq); /* wait for external IRQ handler */
}
static void schedule_chk_task(struct adapter *adap)
@@ -1034,7 +1178,7 @@ static int offload_open(struct net_device *dev)
return 0;
if (!adap_up && (err = cxgb_up(adapter)) < 0)
- return err;
+ goto out;
t3_tp_set_offload_mode(adapter, 1);
tdev->lldev = adapter->port[0];
@@ -1077,6 +1221,9 @@ static int offload_close(struct t3cdev *tdev)
sysfs_remove_group(&tdev->lldev->class_dev.kobj, &offload_attr_group);
+ /* Flush work scheduled while releasing TIDs */
+ flush_scheduled_work();
+
tdev->lldev = NULL;
cxgb3_set_dummy_ops(tdev);
t3_tp_set_offload_mode(adapter, 0);
@@ -1121,19 +1268,26 @@ static int cxgb_close(struct net_device *dev)
struct port_info *pi = netdev_priv(dev);
struct adapter *adapter = pi->adapter;
+
+ if (!adapter->open_device_map)
+ return 0;
+
+ /* Stop link fault interrupts */
+ t3_xgm_intr_disable(adapter, pi->port_id);
+ t3_read_reg(adapter, A_XGM_INT_STATUS + pi->mac.offset);
+
t3_port_intr_disable(adapter, pi->port_id);
netif_stop_queue(dev);
pi->phy.ops->power_down(&pi->phy, 1);
netif_carrier_off(dev);
t3_mac_disable(&pi->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX);
- spin_lock(&adapter->work_lock); /* sync with update task */
+ spin_lock_irq(&adapter->work_lock); /* sync with update task */
clear_bit(pi->port_id, &adapter->open_device_map);
- spin_unlock(&adapter->work_lock);
+ spin_unlock_irq(&adapter->work_lock);
if (!(adapter->open_device_map & PORT_MASK))
- cancel_rearming_delayed_workqueue(cxgb3_wq,
- &adapter->adap_check_task);
+ cancel_delayed_work_sync(&adapter->adap_check_task);
if (!adapter->open_device_map)
cxgb_down(adapter);
@@ -1239,11 +1393,15 @@ static char stats_strings[][ETH_GSTRING_LEN] = {
"VLANinsertions ",
"TxCsumOffload ",
"RxCsumGood ",
+ "LroAggregated ",
+ "LroFlushed ",
+ "LroNoDesc ",
"RxDrops ",
"CheckTXEnToggled ",
"CheckResets ",
+ "LinkFaults ",
};
static int get_stats_count(struct net_device *dev)
@@ -1305,8 +1463,8 @@ static unsigned long collect_sge_port_stats(struct adapter *adapter,
int i;
unsigned long tot = 0;
- for (i = 0; i < p->nqsets; ++i)
- tot += adapter->sge.qs[i + p->first_qset].port_stats[idx];
+ for (i = p->first_qset; i < p->first_qset + p->nqsets; ++i)
+ tot += adapter->sge.qs[i].port_stats[idx];
return tot;
}
@@ -1364,10 +1522,15 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats,
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_VLANINS);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM);
*data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD);
+ *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_AGGR);
+ *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_FLUSHED);
+ *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_LRO_NO_DESC);
*data++ = s->rx_cong_drops;
*data++ = s->num_toggled;
*data++ = s->num_resets;
+
+ *data++ = s->link_faults;
}
static inline void reg_block_dump(struct adapter *ap, void *buf,
@@ -1506,8 +1669,18 @@ static int set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
struct port_info *p = netdev_priv(dev);
struct link_config *lc = &p->link_config;
- if (!(lc->supported & SUPPORTED_Autoneg))
- return -EOPNOTSUPP; /* can't change speed/duplex */
+ if (!(lc->supported & SUPPORTED_Autoneg)) {
+ /*
+ * PHY offers a single speed/duplex. See if that's what's
+ * being requested.
+ */
+ if (cmd->autoneg == AUTONEG_DISABLE) {
+ int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
+ if (lc->supported & cap)
+ return 0;
+ }
+ return -EINVAL;
+ }
if (cmd->autoneg == AUTONEG_DISABLE) {
int cap = speed_duplex_to_caps(cmd->speed, cmd->duplex);
@@ -1574,14 +1747,25 @@ static u32 get_rx_csum(struct net_device *dev)
{
struct port_info *p = netdev_priv(dev);
- return p->rx_csum_offload;
+ return p->rx_offload & T3_RX_CSUM;
}
static int set_rx_csum(struct net_device *dev, u32 data)
{
struct port_info *p = netdev_priv(dev);
- p->rx_csum_offload = data;
+ if (data)
+ p->rx_offload |= T3_RX_CSUM;
+ else {
+ struct adapter *adap = p->adapter;
+ int i;
+
+ p->rx_offload &= ~(T3_RX_CSUM | T3_LRO);
+ for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
+ adap->params.sge.qset[i].lro = 0;
+ adap->sge.qs[i].lro_enabled = 0;
+ }
+ }
return 0;
}
@@ -1735,7 +1919,7 @@ static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
memset(&wol->sopass, 0, sizeof(wol->sopass));
}
-static const struct ethtool_ops cxgb_ethtool_ops = {
+static struct ethtool_ops cxgb_ethtool_ops = {
.get_settings = get_settings,
.set_settings = set_settings,
.get_drvinfo = get_drvinfo,
@@ -1752,7 +1936,9 @@ static const struct ethtool_ops cxgb_ethtool_ops = {
.set_pauseparam = set_pauseparam,
.get_rx_csum = get_rx_csum,
.set_rx_csum = set_rx_csum,
+ .get_tx_csum = ethtool_op_get_tx_csum,
.set_tx_csum = ethtool_op_set_tx_csum,
+ .get_sg = ethtool_op_get_sg,
.set_sg = ethtool_op_set_sg,
.get_link = ethtool_op_get_link,
.get_strings = get_strings,
@@ -1763,7 +1949,9 @@ static const struct ethtool_ops cxgb_ethtool_ops = {
.get_regs_len = get_regs_len,
.get_regs = get_regs,
.get_wol = get_wol,
+ .get_tso = ethtool_op_get_tso,
.set_tso = ethtool_op_set_tso,
+ .get_perm_addr = ethtool_op_get_perm_addr
};
static int in_range(int val, int lo, int hi)
@@ -1786,6 +1974,8 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
int i;
struct qset_params *q;
struct ch_qset_params t;
+ int q1 = pi->first_qset;
+ int nqsets = pi->nqsets;
if (!capable(CAP_NET_ADMIN))
return -EPERM;
@@ -1808,6 +1998,16 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
|| !in_range(t.rspq_size, MIN_RSPQ_ENTRIES,
MAX_RSPQ_ENTRIES))
return -EINVAL;
+
+ if ((adapter->flags & FULL_INIT_DONE) && t.lro > 0)
+ for_each_port(adapter, i) {
+ pi = adap2pinfo(adapter, i);
+ if (t.qset_idx >= pi->first_qset &&
+ t.qset_idx < pi->first_qset + pi->nqsets &&
+ !(pi->rx_offload & T3_RX_CSUM))
+ return -EINVAL;
+ }
+
if ((adapter->flags & FULL_INIT_DONE) &&
(t.rspq_size >= 0 || t.fl_size[0] >= 0 ||
t.fl_size[1] >= 0 || t.txq_size[0] >= 0 ||
@@ -1815,6 +2015,20 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
t.polling >= 0 || t.cong_thres >= 0))
return -EBUSY;
+ /* Allow setting of any available qset when offload enabled */
+ if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
+ q1 = 0;
+ for_each_port(adapter, i) {
+ pi = adap2pinfo(adapter, i);
+ nqsets += pi->first_qset + pi->nqsets;
+ }
+ }
+
+ if (t.qset_idx < q1)
+ return -EINVAL;
+ if (t.qset_idx > q1 + nqsets - 1)
+ return -EINVAL;
+
q = &adapter->params.sge.qset[t.qset_idx];
if (t.rspq_size >= 0)
@@ -1854,18 +2068,36 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
}
}
}
+ if (t.lro >= 0) {
+ struct sge_qset *qs = &adapter->sge.qs[t.qset_idx];
+ q->lro = t.lro;
+ qs->lro_enabled = t.lro;
+ }
break;
}
case CHELSIO_GET_QSET_PARAMS:{
struct qset_params *q;
struct ch_qset_params t;
+ int q1 = pi->first_qset;
+ int nqsets = pi->nqsets;
+ int i;
if (copy_from_user(&t, useraddr, sizeof(t)))
return -EFAULT;
- if (t.qset_idx >= SGE_QSETS)
+
+ /* Display qsets for all ports when offload enabled */
+ if (test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
+ q1 = 0;
+ for_each_port(adapter, i) {
+ pi = adap2pinfo(adapter, i);
+ nqsets = pi->first_qset + pi->nqsets;
+ }
+ }
+
+ if (t.qset_idx >= nqsets)
return -EINVAL;
- q = &adapter->params.sge.qset[t.qset_idx];
+ q = &adapter->params.sge.qset[q1 + t.qset_idx];
t.rspq_size = q->rspq_size;
t.txq_size[0] = q->txq_size[0];
t.txq_size[1] = q->txq_size[1];
@@ -1873,8 +2105,15 @@ static int cxgb_extension_ioctl(struct net_device *dev, void __user *useraddr)
t.fl_size[0] = q->fl_size;
t.fl_size[1] = q->jumbo_size;
t.polling = q->polling;
+ t.lro = q->lro;
t.intr_lat = q->coalesce_usecs;
t.cong_thres = q->cong_thres;
+ t.qnum = q1;
+
+ if (adapter->flags & USING_MSIX)
+ t.vector = adapter->msix_info[q1 + t.qset_idx + 1].vec;
+ else
+ t.vector = adapter->pdev->irq;
if (copy_to_user(useraddr, &t, sizeof(t)))
return -EFAULT;
@@ -2122,7 +2361,7 @@ static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
mmd = data->phy_id >> 8;
if (!mmd)
mmd = MDIO_DEV_PCS;
- else if (mmd > MDIO_DEV_XGXS)
+ else if (mmd > MDIO_DEV_VEND2)
return -EINVAL;
ret =
@@ -2148,7 +2387,7 @@ static int cxgb_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
mmd = data->phy_id >> 8;
if (!mmd)
mmd = MDIO_DEV_PCS;
- else if (mmd > MDIO_DEV_XGXS)
+ else if (mmd > MDIO_DEV_VEND2)
return -EINVAL;
ret =
@@ -2220,8 +2459,8 @@ static void t3_synchronize_rx(struct adapter *adap, const struct port_info *p)
{
int i;
- for (i = 0; i < p->nqsets; i++) {
- struct sge_rspq *q = &adap->sge.qs[i + p->first_qset].rspq;
+ for (i = p->first_qset; i < p->first_qset + p->nqsets; i++) {
+ struct sge_rspq *q = &adap->sge.qs[i].rspq;
spin_lock_irq(&q->lock);
spin_unlock_irq(&q->lock);
@@ -2247,6 +2486,11 @@ static void vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
t3_synchronize_rx(adapter, pi);
}
+static void vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
+{
+ /* nothing */
+}
+
#ifdef CONFIG_NET_POLL_CONTROLLER
static void cxgb_netpoll(struct net_device *dev)
{
@@ -2295,8 +2539,21 @@ static void check_link_status(struct adapter *adapter)
struct net_device *dev = adapter->port[i];
struct port_info *p = netdev_priv(dev);
- if (!(p->port_type->caps & SUPPORTED_IRQ) && netif_running(dev))
+ spin_lock_irq(&adapter->work_lock);
+ if (p->link_fault) {
+ t3_link_fault(adapter, i);
+ spin_unlock_irq(&adapter->work_lock);
+ continue;
+ }
+ spin_unlock_irq(&adapter->work_lock);
+
+ if (!(p->phy.caps & SUPPORTED_IRQ) && netif_running(dev)) {
+ t3_xgm_intr_disable(adapter, i);
+ t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
+
t3_link_changed(adapter, i);
+ t3_xgm_intr_enable(adapter, i);
+ }
}
}
@@ -2341,12 +2598,12 @@ static void t3_adap_check_task(struct work_struct *work)
struct adapter *adapter = container_of(work, struct adapter,
adap_check_task.work);
const struct adapter_params *p = &adapter->params;
+ int port;
+ unsigned int v, status, reset;
adapter->check_task_cnt++;
- /* Check link status for PHYs without interrupts */
- if (p->linkpoll_period)
- check_link_status(adapter);
+ check_link_status(adapter);
/* Accumulate MAC stats if needed */
if (!p->linkpoll_period ||
@@ -2359,11 +2616,59 @@ static void t3_adap_check_task(struct work_struct *work)
if (p->rev == T3_REV_B2)
check_t3b2_mac(adapter);
+ /*
+ * Scan the XGMAC's to check for various conditions which we want to
+ * monitor in a periodic polling manner rather than via an interrupt
+ * condition. This is used for conditions which would otherwise flood
+ * the system with interrupts and we only really need to know that the
+ * conditions are "happening" ... For each condition we count the
+ * detection of the condition and reset it for the next polling loop.
+ */
+ for_each_port(adapter, port) {
+ struct cmac *mac = &adap2pinfo(adapter, port)->mac;
+ u32 cause;
+
+ cause = t3_read_reg(adapter, A_XGM_INT_CAUSE + mac->offset);
+ reset = 0;
+ if (cause & F_RXFIFO_OVERFLOW) {
+ mac->stats.rx_fifo_ovfl++;
+ reset |= F_RXFIFO_OVERFLOW;
+ }
+
+ t3_write_reg(adapter, A_XGM_INT_CAUSE + mac->offset, reset);
+ }
+
+ /*
+ * We do the same as above for FL_EMPTY interrupts.
+ */
+ status = t3_read_reg(adapter, A_SG_INT_CAUSE);
+ reset = 0;
+
+ if (status & F_FLEMPTY) {
+ struct sge_qset *qs = &adapter->sge.qs[0];
+ int i = 0;
+
+ reset |= F_FLEMPTY;
+
+ v = (t3_read_reg(adapter, A_SG_RSPQ_FL_STATUS) >> S_FL0EMPTY) &
+ 0xffff;
+
+ while (v) {
+ qs->fl[i].empty += (v & 1);
+ if (i)
+ qs++;
+ i ^= 1;
+ v >>= 1;
+ }
+ }
+
+ t3_write_reg(adapter, A_SG_INT_CAUSE, reset);
+
/* Schedule the next check update if any port is active. */
- spin_lock(&adapter->work_lock);
+ spin_lock_irq(&adapter->work_lock);
if (adapter->open_device_map & PORT_MASK)
schedule_chk_task(adapter);
- spin_unlock(&adapter->work_lock);
+ spin_unlock_irq(&adapter->work_lock);
}
/*
@@ -2373,9 +2678,23 @@ static void ext_intr_task(struct work_struct *work)
{
struct adapter *adapter = container_of(work, struct adapter,
ext_intr_handler_task);
+ int i;
+
+ /* Disable link fault interrupts */
+ for_each_port(adapter, i) {
+ struct net_device *dev = adapter->port[i];
+ struct port_info *p = netdev_priv(dev);
+
+ t3_xgm_intr_disable(adapter, i);
+ t3_read_reg(adapter, A_XGM_INT_STATUS + p->mac.offset);
+ }
t3_phy_intr_handler(adapter);
+ /* Re-enable link fault interrupts */
+ for_each_port(adapter, i)
+ t3_xgm_intr_enable(adapter, i);
+
/* Now reenable external interrupts */
spin_lock_irq(&adapter->work_lock);
if (adapter->slow_intr_mask) {
@@ -2408,6 +2727,111 @@ void t3_os_ext_intr_handler(struct adapter *adapter)
spin_unlock(&adapter->work_lock);
}
+void t3_os_link_fault_handler(struct adapter *adapter, int port_id)
+{
+ struct net_device *netdev = adapter->port[port_id];
+ struct port_info *pi = netdev_priv(netdev);
+
+ spin_lock(&adapter->work_lock);
+ pi->link_fault = 1;
+ spin_unlock(&adapter->work_lock);
+}
+
+static int t3_adapter_error(struct adapter *adapter, int reset)
+{
+ int i, ret = 0;
+
+ if (is_offload(adapter) &&
+ test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map)) {
+ cxgb3_err_notify(&adapter->tdev, OFFLOAD_STATUS_DOWN, 0);
+ offload_close(&adapter->tdev);
+ }
+
+ /* Stop all ports */
+ for_each_port(adapter, i) {
+ struct net_device *netdev = adapter->port[i];
+
+ if (netif_running(netdev))
+ cxgb_close(netdev);
+ }
+
+ /* Stop SGE timers */
+ t3_stop_sge_timers(adapter);
+
+ adapter->flags &= ~FULL_INIT_DONE;
+
+ if (reset)
+ ret = t3_reset_adapter(adapter);
+
+ pci_disable_device(adapter->pdev);
+
+ return ret;
+}
+
+static int t3_reenable_adapter(struct adapter *adapter)
+{
+ if (pci_enable_device(adapter->pdev)) {
+ dev_err(&adapter->pdev->dev,
+ "Cannot re-enable PCI device after reset.\n");
+ goto err;
+ }
+ pci_set_master(adapter->pdev);
+ pci_restore_state(adapter->pdev);
+
+ /* Free sge resources */
+ t3_free_sge_resources(adapter);
+
+ if (t3_replay_prep_adapter(adapter))
+ goto err;
+
+ return 0;
+err:
+ return -1;
+}
+
+static void t3_resume_ports(struct adapter *adapter)
+{
+ int i;
+
+ /* Restart the ports */
+ for_each_port(adapter, i) {
+ struct net_device *netdev = adapter->port[i];
+
+ if (netif_running(netdev)) {
+ if (cxgb_open(netdev)) {
+ dev_err(&adapter->pdev->dev,
+ "can't bring device back up"
+ " after reset\n");
+ continue;
+ }
+ }
+ }
+
+ if (is_offload(adapter) && !ofld_disable)
+ cxgb3_err_notify(&adapter->tdev, OFFLOAD_STATUS_UP, 0);
+}
+
+/*
+ * processes a fatal error.
+ * Bring the ports down, reset the chip, bring the ports back up.
+ */
+static void fatal_error_task(struct work_struct *work)
+{
+ struct adapter *adapter = container_of(work, struct adapter,
+ fatal_error_handler_task);
+ int err = 0;
+
+ rtnl_lock();
+ err = t3_adapter_error(adapter, 1);
+ if (!err)
+ err = t3_reenable_adapter(adapter);
+ if (!err)
+ t3_resume_ports(adapter);
+
+ CH_ALERT(adapter, "adapter reset %s\n", err ? "failed" : "succeeded");
+ rtnl_unlock();
+}
+
void t3_fatal_err(struct adapter *adapter)
{
unsigned int fw_status[4];
@@ -2418,14 +2842,17 @@ void t3_fatal_err(struct adapter *adapter)
t3_write_reg(adapter, A_XGM_RX_CTRL, 0);
t3_write_reg(adapter, XGM_REG(A_XGM_TX_CTRL, 1), 0);
t3_write_reg(adapter, XGM_REG(A_XGM_RX_CTRL, 1), 0);
+
+ spin_lock(&adapter->work_lock);
t3_intr_disable(adapter);
+ queue_work(cxgb3_wq, &adapter->fatal_error_handler_task);
+ spin_unlock(&adapter->work_lock);
}
CH_ALERT(adapter, "encountered fatal error, operation suspended\n");
if (!t3_cim_ctl_blk_read(adapter, 0xa0, 4, fw_status))
CH_ALERT(adapter, "FW status: 0x%x, 0x%x, 0x%x, 0x%x\n",
fw_status[0], fw_status[1],
fw_status[2], fw_status[3]);
-
}
/**
@@ -2440,28 +2867,14 @@ static pci_ers_result_t t3_io_error_detected(struct pci_dev *pdev,
pci_channel_state_t state)
{
struct adapter *adapter = pci_get_drvdata(pdev);
- int i;
-
- /* Stop all ports */
- for_each_port(adapter, i) {
- struct net_device *netdev = adapter->port[i];
-
- if (netif_running(netdev))
- cxgb_close(netdev);
- }
-
- if (is_offload(adapter) &&
- test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map))
- offload_close(&adapter->tdev);
-
- /* Free sge resources */
- t3_free_sge_resources(adapter);
+ int ret;
- adapter->flags &= ~FULL_INIT_DONE;
+ if (state == pci_channel_io_perm_failure)
+ return PCI_ERS_RESULT_DISCONNECT;
- pci_disable_device(pdev);
+ ret = t3_adapter_error(adapter, 0);
- /* Request a slot slot reset. */
+ /* Request a slot reset. */
return PCI_ERS_RESULT_NEED_RESET;
}
@@ -2475,16 +2888,10 @@ static pci_ers_result_t t3_io_slot_reset(struct pci_dev *pdev)
{
struct adapter *adapter = pci_get_drvdata(pdev);
- if (pci_enable_device(pdev)) {
- dev_err(&pdev->dev,
- "Cannot re-enable PCI device after reset.\n");
- return PCI_ERS_RESULT_DISCONNECT;
- }
- pci_set_master(pdev);
-
- t3_prep_adapter(adapter, adapter->params.info, 1);
+ if (!t3_reenable_adapter(adapter))
+ return PCI_ERS_RESULT_RECOVERED;
- return PCI_ERS_RESULT_RECOVERED;
+ return PCI_ERS_RESULT_DISCONNECT;
}
/**
@@ -2497,29 +2904,11 @@ static pci_ers_result_t t3_io_slot_reset(struct pci_dev *pdev)
static void t3_io_resume(struct pci_dev *pdev)
{
struct adapter *adapter = pci_get_drvdata(pdev);
- int i;
- /* Restart the ports */
- for_each_port(adapter, i) {
- struct net_device *netdev = adapter->port[i];
+ CH_ALERT(adapter, "adapter recovering, PEX ERR 0x%x\n",
+ t3_read_reg(adapter, A_PCIE_PEX_ERR));
- if (netif_running(netdev)) {
- if (cxgb_open(netdev)) {
- dev_err(&pdev->dev,
- "can't bring device back up"
- " after reset\n");
- continue;
- }
- netif_device_attach(netdev);
- }
- }
-
- if (is_offload(adapter)) {
- __set_bit(OFFLOAD_DEVMAP_BIT, &adapter->registered_device_map);
- if (offload_open(adapter->port[0]))
- printk(KERN_WARNING
- "Could not bring back offload capabilities\n");
- }
+ t3_resume_ports(adapter);
}
static struct pci_error_handlers t3_err_handler = {
@@ -2528,21 +2917,69 @@ static struct pci_error_handlers t3_err_handler = {
.resume = t3_io_resume,
};
+/*
+ * Set the number of qsets based on the number of CPUs and the number of ports,
+ * not to exceed the number of available qsets, assuming there are enough qsets
+ * per port in HW.
+ */
+static void set_nqsets(struct adapter *adap)
+{
+ int i, j = 0;
+ int num_cpus = num_online_cpus();
+ int hwports = adap->params.nports;
+ int nqsets = adap->msix_nvectors - 1;
+
+ if (adap->params.rev > 0 && adap->flags & USING_MSIX) {
+ if (hwports == 2 &&
+ (hwports * nqsets > SGE_QSETS ||
+ num_cpus >= nqsets / hwports))
+ nqsets /= hwports;
+ if (nqsets > num_cpus)
+ nqsets = num_cpus;
+ if (nqsets < 1 || hwports == 4)
+ nqsets = 1;
+ } else
+ nqsets = 1;
+
+ for_each_port(adap, i) {
+ struct port_info *pi = adap2pinfo(adap, i);
+
+ pi->first_qset = j;
+ pi->nqsets = nqsets;
+ j = pi->first_qset + nqsets;
+
+ dev_info(&adap->pdev->dev,
+ "Port %d using %d queue sets.\n", i, nqsets);
+ }
+}
+
static int __devinit cxgb_enable_msix(struct adapter *adap)
{
struct msix_entry entries[SGE_QSETS + 1];
+ int vectors;
int i, err;
- for (i = 0; i < ARRAY_SIZE(entries); ++i)
+ vectors = ARRAY_SIZE(entries);
+ for (i = 0; i < vectors; ++i)
entries[i].entry = i;
- err = pci_enable_msix(adap->pdev, entries, ARRAY_SIZE(entries));
+ while ((err = pci_enable_msix(adap->pdev, entries, vectors)) > 0)
+ vectors = err;
+
+ if (err < 0)
+ pci_disable_msix(adap->pdev);
+
+ if (!err && vectors < (adap->params.nports + 1)) {
+ pci_disable_msix(adap->pdev);
+ err = -1;
+ }
+
if (!err) {
- for (i = 0; i < ARRAY_SIZE(entries); ++i)
+ for (i = 0; i < vectors; ++i)
adap->msix_info[i].vec = entries[i].vector;
- } else if (err > 0)
- dev_info(&adap->pdev->dev,
- "only %d MSI-X vectors left, not using MSI-X\n", err);
+ adap->msix_nvectors = vectors;
+ }
+
return err;
}
@@ -2572,7 +3009,7 @@ static void __devinit print_port_info(struct adapter *adap,
if (!test_bit(i, &adap->registered_device_map))
continue;
printk(KERN_INFO "%s: %s %s %sNIC (rev %d) %s%s\n",
- dev->name, ai->desc, pi->port_type->desc,
+ dev->name, ai->desc, pi->phy.desc,
is_offload(adap) ? "R" : "", adap->params.rev, buf,
(adap->flags & USING_MSIX) ? " MSI-X" :
(adap->flags & USING_MSI) ? " MSI" : "");
@@ -2592,7 +3029,7 @@ static int __devinit init_one(struct pci_dev *pdev,
static int version_printed;
int i, err, pci_using_dac = 0;
- unsigned long mmio_start, mmio_len;
+ resource_size_t mmio_start, mmio_len;
const struct adapter_info *ai;
struct adapter *adapter = NULL;
struct port_info *pi;
@@ -2638,6 +3075,7 @@ static int __devinit init_one(struct pci_dev *pdev,
}
pci_set_master(pdev);
+ pci_save_state(pdev);
mmio_start = pci_resource_start(pdev, 0);
mmio_len = pci_resource_len(pdev, 0);
@@ -2667,9 +3105,10 @@ static int __devinit init_one(struct pci_dev *pdev,
INIT_LIST_HEAD(&adapter->adapter_list);
INIT_WORK(&adapter->ext_intr_handler_task, ext_intr_task);
+ INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task);
INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task);
- for (i = 0; i < ai->nports; ++i) {
+ for (i = 0; i < ai->nports0 + ai->nports1; ++i) {
struct net_device *netdev;
netdev = alloc_etherdev(sizeof(struct port_info));
@@ -2678,15 +3117,13 @@ static int __devinit init_one(struct pci_dev *pdev,
goto out_free_dev;
}
+ SET_MODULE_OWNER(netdev);
SET_NETDEV_DEV(netdev, &pdev->dev);
adapter->port[i] = netdev;
pi = netdev_priv(netdev);
pi->adapter = adapter;
- pi->rx_csum_offload = 1;
- pi->nqsets = 1;
- pi->first_qset = i;
- pi->activity = 0;
+ pi->rx_offload = T3_RX_CSUM | T3_LRO;
pi->port_id = i;
netif_carrier_off(netdev);
netdev->irq = pdev->irq;
@@ -2694,11 +3131,13 @@ static int __devinit init_one(struct pci_dev *pdev,
netdev->mem_end = mmio_start + mmio_len - 1;
netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
netdev->features |= NETIF_F_LLTX;
+ netdev->features |= NETIF_F_LRO;
if (pci_using_dac)
netdev->features |= NETIF_F_HIGHDMA;
netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
netdev->vlan_rx_register = vlan_rx_register;
+ netdev->vlan_rx_kill_vid = vlan_rx_kill_vid;
netdev->open = cxgb_open;
netdev->stop = cxgb_close;
@@ -2764,6 +3203,8 @@ static int __devinit init_one(struct pci_dev *pdev,
else if (msi > 0 && pci_enable_msi(pdev) == 0)
adapter->flags |= USING_MSI;
+ set_nqsets(adapter);
+
err = sysfs_create_group(&adapter->port[0]->class_dev.kobj,
&cxgb3_attr_group);
@@ -2772,7 +3213,7 @@ static int __devinit init_one(struct pci_dev *pdev,
out_free_dev:
iounmap(adapter->regs);
- for (i = ai->nports - 1; i >= 0; --i)
+ for (i = ai->nports0 + ai->nports1 - 1; i >= 0; --i)
if (adapter->port[i])
free_netdev(adapter->port[i]);
@@ -2809,6 +3250,7 @@ static void __devexit remove_one(struct pci_dev *pdev)
if (test_bit(i, &adapter->registered_device_map))
unregister_netdev(adapter->port[i]);
+ t3_stop_sge_timers(adapter);
t3_free_sge_resources(adapter);
cxgb_disable_msi(adapter);
diff --git a/drivers/net/cxgb3/cxgb3_offload.c b/drivers/net/cxgb3/cxgb3_offload.c
index c5b3de1..620d80b 100644
--- a/drivers/net/cxgb3/cxgb3_offload.c
+++ b/drivers/net/cxgb3/cxgb3_offload.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2006-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -153,6 +153,18 @@ void cxgb3_remove_clients(struct t3cdev *tdev)
mutex_unlock(&cxgb3_db_lock);
}
+void cxgb3_err_notify(struct t3cdev *tdev, u32 status, u32 error)
+{
+ struct cxgb3_client *client;
+
+ mutex_lock(&cxgb3_db_lock);
+ list_for_each_entry(client, &client_list, client_list) {
+ if (client->err_handler)
+ client->err_handler(tdev, status, error);
+ }
+ mutex_unlock(&cxgb3_db_lock);
+}
+
static struct net_device *get_iff_from_mac(struct adapter *adapter,
const unsigned char *mac,
unsigned int vlan)
@@ -182,7 +194,9 @@ static struct net_device *get_iff_from_mac(struct adapter *adapter,
static int cxgb_ulp_iscsi_ctl(struct adapter *adapter, unsigned int req,
void *data)
{
+ int i;
int ret = 0;
+ unsigned int val = 0;
struct ulp_iscsi_info *uiip = data;
switch (req) {
@@ -191,32 +205,55 @@ static int cxgb_ulp_iscsi_ctl(struct adapter *adapter, unsigned int req,
uiip->llimit = t3_read_reg(adapter, A_ULPRX_ISCSI_LLIMIT);
uiip->ulimit = t3_read_reg(adapter, A_ULPRX_ISCSI_ULIMIT);
uiip->tagmask = t3_read_reg(adapter, A_ULPRX_ISCSI_TAGMASK);
+
+ val = t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ);
+ for (i = 0; i < 4; i++, val >>= 8)
+ uiip->pgsz_factor[i] = val & 0xFF;
+
+ val = t3_read_reg(adapter, A_TP_PARA_REG7);
+ uiip->max_txsz =
+ uiip->max_rxsz = min((val >> S_PMMAXXFERLEN0)&M_PMMAXXFERLEN0,
+ (val >> S_PMMAXXFERLEN1)&M_PMMAXXFERLEN1);
/*
* On tx, the iscsi pdu has to be <= tx page size and has to
* fit into the Tx PM FIFO.
*/
- uiip->max_txsz = min(adapter->params.tp.tx_pg_size,
- t3_read_reg(adapter, A_PM1_TX_CFG) >> 17);
- /* on rx, the iscsi pdu has to be < rx page size and the
- whole pdu + cpl headers has to fit into one sge buffer */
- uiip->max_rxsz = min_t(unsigned int,
- adapter->params.tp.rx_pg_size,
- (adapter->sge.qs[0].fl[1].buf_size -
- sizeof(struct cpl_rx_data) * 2 -
- sizeof(struct cpl_rx_data_ddp)));
+ val = min(adapter->params.tp.tx_pg_size,
+ t3_read_reg(adapter, A_PM1_TX_CFG) >> 17);
+ uiip->max_txsz = min(val, uiip->max_txsz);
+
+ /* set MaxRxData to 16224 */
+ val = t3_read_reg(adapter, A_TP_PARA_REG2);
+ if ((val >> S_MAXRXDATA) != 0x3f60) {
+ val &= (M_RXCOALESCESIZE << S_RXCOALESCESIZE);
+ val |= V_MAXRXDATA(0x3f60);
+ printk(KERN_INFO
+ "%s, iscsi set MaxRxData to 16224 (0x%x).\n",
+ adapter->name, val);
+ t3_write_reg(adapter, A_TP_PARA_REG2, val);
+ }
+
+ /*
+ * on rx, the iscsi pdu has to be < rx page size and the
+ * the max rx data length programmed in TP
+ */
+ val = min(adapter->params.tp.rx_pg_size,
+ ((t3_read_reg(adapter, A_TP_PARA_REG2)) >>
+ S_MAXRXDATA) & M_MAXRXDATA);
+ uiip->max_rxsz = min(val, uiip->max_rxsz);
break;
case ULP_ISCSI_SET_PARAMS:
t3_write_reg(adapter, A_ULPRX_ISCSI_TAGMASK, uiip->tagmask);
- /* set MaxRxData and MaxCoalesceSize to 16224 */
- t3_write_reg(adapter, A_TP_PARA_REG2, 0x3f603f60);
/* program the ddp page sizes */
- {
- int i;
- unsigned int val = 0;
- for (i = 0; i < 4; i++)
- val |= (uiip->pgsz_factor[i] & 0xF) << (8 * i);
- if (val)
- t3_write_reg(adapter, A_ULPRX_ISCSI_PSZ, val);
+ for (i = 0; i < 4; i++)
+ val |= (uiip->pgsz_factor[i] & 0xF) << (8 * i);
+ if (val && (val != t3_read_reg(adapter, A_ULPRX_ISCSI_PSZ))) {
+ printk(KERN_INFO
+ "%s, setting iscsi pgsz 0x%x, %u,%u,%u,%u.\n",
+ adapter->name, val, uiip->pgsz_factor[0],
+ uiip->pgsz_factor[1], uiip->pgsz_factor[2],
+ uiip->pgsz_factor[3]);
+ t3_write_reg(adapter, A_ULPRX_ISCSI_PSZ, val);
}
break;
default:
@@ -407,6 +444,21 @@ static int cxgb_offload_ctl(struct t3cdev *tdev, unsigned int req, void *data)
rx_page_info->page_size = tp->rx_pg_size;
rx_page_info->num = tp->rx_num_pgs;
break;
+ case GET_ISCSI_IPV4ADDR: {
+ struct iscsi_ipv4addr *p = data;
+ struct port_info *pi = netdev_priv(p->dev);
+ p->ipv4addr = pi->iscsi_ipv4addr;
+ break;
+ }
+ case GET_EMBEDDED_INFO: {
+ struct ch_embedded_info *e = data;
+
+ spin_lock(&adapter->stats_lock);
+ t3_get_fw_version(adapter, &e->fw_vers);
+ t3_get_tp_version(adapter, &e->tp_vers);
+ spin_unlock(&adapter->stats_lock);
+ break;
+ }
default:
return -EOPNOTSUPP;
}
@@ -1018,7 +1070,7 @@ static void set_l2t_ix(struct t3cdev *tdev, u32 tid, struct l2t_entry *e)
skb = alloc_skb(sizeof(*req), GFP_ATOMIC);
if (!skb) {
- printk(KERN_ERR "%s: cannot allocate skb!\n", __FUNCTION__);
+ printk(KERN_ERR "%s: cannot allocate skb!\n", __func__);
return;
}
skb->priority = CPL_PRIORITY_CONTROL;
@@ -1049,14 +1101,14 @@ void cxgb_redirect(struct dst_entry *old, struct dst_entry *new)
return;
if (!is_offloading(newdev)) {
printk(KERN_WARNING "%s: Redirect to non-offload "
- "device ignored.\n", __FUNCTION__);
+ "device ignored.\n", __func__);
return;
}
tdev = dev2t3cdev(olddev);
BUG_ON(!tdev);
if (tdev != dev2t3cdev(newdev)) {
printk(KERN_WARNING "%s: Redirect to different "
- "offload device ignored.\n", __FUNCTION__);
+ "offload device ignored.\n", __func__);
return;
}
@@ -1064,7 +1116,7 @@ void cxgb_redirect(struct dst_entry *old, struct dst_entry *new)
e = t3_l2t_get(tdev, new->neighbour, newdev);
if (!e) {
printk(KERN_ERR "%s: couldn't allocate new l2t entry!\n",
- __FUNCTION__);
+ __func__);
return;
}
diff --git a/drivers/net/cxgb3/cxgb3_offload.h b/drivers/net/cxgb3/cxgb3_offload.h
index 7a37913..a8e8e5f 100644
--- a/drivers/net/cxgb3/cxgb3_offload.h
+++ b/drivers/net/cxgb3/cxgb3_offload.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2006-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -64,10 +64,16 @@ void cxgb3_register_client(struct cxgb3_client *client);
void cxgb3_unregister_client(struct cxgb3_client *client);
void cxgb3_add_clients(struct t3cdev *tdev);
void cxgb3_remove_clients(struct t3cdev *tdev);
+void cxgb3_err_notify(struct t3cdev *tdev, u32 status, u32 error);
typedef int (*cxgb3_cpl_handler_func)(struct t3cdev *dev,
struct sk_buff *skb, void *ctx);
+enum {
+ OFFLOAD_STATUS_UP,
+ OFFLOAD_STATUS_DOWN
+};
+
struct cxgb3_client {
char *name;
void (*add) (struct t3cdev *);
@@ -76,6 +82,7 @@ struct cxgb3_client {
int (*redirect)(void *ctx, struct dst_entry *old,
struct dst_entry *new, struct l2t_entry *l2t);
struct list_head client_list;
+ void (*err_handler)(struct t3cdev *tdev, u32 status, u32 error);
};
/*
diff --git a/drivers/net/cxgb3/firmware_exports.h b/drivers/net/cxgb3/firmware_exports.h
index b75ddd8..0d9b0e6 100644
--- a/drivers/net/cxgb3/firmware_exports.h
+++ b/drivers/net/cxgb3/firmware_exports.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2004-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/l2t.c b/drivers/net/cxgb3/l2t.c
index 825e510..3b20251 100644
--- a/drivers/net/cxgb3/l2t.c
+++ b/drivers/net/cxgb3/l2t.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/l2t.h b/drivers/net/cxgb3/l2t.h
index d790013..55770f3 100644
--- a/drivers/net/cxgb3/l2t.h
+++ b/drivers/net/cxgb3/l2t.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/mc5.c b/drivers/net/cxgb3/mc5.c
index 4c4d6e8..3b5517b 100644
--- a/drivers/net/cxgb3/mc5.c
+++ b/drivers/net/cxgb3/mc5.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h
index 0116aac..1b5327b 100644
--- a/drivers/net/cxgb3/regs.h
+++ b/drivers/net/cxgb3/regs.h
@@ -170,6 +170,10 @@
#define S_RSPQ0DISABLED 8
+#define S_FL0EMPTY 16
+#define V_FL0EMPTY(x) ((x) << S_FL0EMPTY)
+#define F_FL0EMPTY V_FL0EMPTY(1U)
+
#define A_SG_EGR_RCQ_DRB_THRSH 0x54
#define S_HIRCQDRBTHRSH 16
@@ -258,6 +262,10 @@
#define V_RSPQCREDITOVERFOW(x) ((x) << S_RSPQCREDITOVERFOW)
#define F_RSPQCREDITOVERFOW V_RSPQCREDITOVERFOW(1U)
+#define S_FLEMPTY 1
+#define V_FLEMPTY(x) ((x) << S_FLEMPTY)
+#define F_FLEMPTY V_FLEMPTY(1U)
+
#define A_SG_INT_ENABLE 0x60
#define A_SG_CMDQ_CREDIT_TH 0x64
@@ -444,6 +452,14 @@
#define A_PCIE_CFG 0x88
+#define S_ENABLELINKDWNDRST 21
+#define V_ENABLELINKDWNDRST(x) ((x) << S_ENABLELINKDWNDRST)
+#define F_ENABLELINKDWNDRST V_ENABLELINKDWNDRST(1U)
+
+#define S_ENABLELINKDOWNRST 20
+#define V_ENABLELINKDOWNRST(x) ((x) << S_ENABLELINKDOWNRST)
+#define F_ENABLELINKDOWNRST V_ENABLELINKDOWNRST(1U)
+
#define S_PCIE_CLIDECEN 16
#define V_PCIE_CLIDECEN(x) ((x) << S_PCIE_CLIDECEN)
#define F_PCIE_CLIDECEN V_PCIE_CLIDECEN(1U)
@@ -565,6 +581,10 @@
#define V_GPIO10(x) ((x) << S_GPIO10)
#define F_GPIO10 V_GPIO10(1U)
+#define S_GPIO9 9
+#define V_GPIO9(x) ((x) << S_GPIO9)
+#define F_GPIO9 V_GPIO9(1U)
+
#define S_GPIO7 7
#define V_GPIO7(x) ((x) << S_GPIO7)
#define F_GPIO7 V_GPIO7(1U)
@@ -2195,6 +2215,15 @@
#define A_XGM_RX_EXACT_MATCH_LOW_8 0x854
+#define A_XGM_INT_STATUS 0x86c
+
+#define S_LINKFAULTCHANGE 9
+#define V_LINKFAULTCHANGE(x) ((x) << S_LINKFAULTCHANGE)
+#define F_LINKFAULTCHANGE V_LINKFAULTCHANGE(1U)
+
+#define A_XGM_XGM_INT_ENABLE 0x874
+#define A_XGM_XGM_INT_DISABLE 0x878
+
#define A_XGM_STAT_CTRL 0x880
#define S_CLRSTATS 2
@@ -2393,6 +2422,10 @@
#define V_XAUIPCSALIGNCHANGE(x) ((x) << S_XAUIPCSALIGNCHANGE)
#define F_XAUIPCSALIGNCHANGE V_XAUIPCSALIGNCHANGE(1U)
+#define S_XGM_INT 0
+#define V_XGM_INT(x) ((x) << S_XGM_INT)
+#define F_XGM_INT V_XGM_INT(1U)
+
#define A_XGM_INT_CAUSE 0x8d8
#define A_XGM_XAUI_ACT_CTRL 0x8dc
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index 36fd845..0fb6351 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -36,6 +36,7 @@
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/dma-mapping.h>
+#include <net/arp.h>
#include "common.h"
#include "regs.h"
#include "sge_defs.h"
@@ -60,12 +61,19 @@
#define FL1_PG_ORDER (PAGE_SIZE > 8192 ? 0 : 1)
#define SGE_RX_DROP_THRES 16
+#define RX_RECLAIM_PERIOD (HZ/4)
/*
+ * Max number of Rx buffers we replenish at a time.
+ */
+#define MAX_RX_REFILL 16U
+/*
* Period of the Tx buffer reclaim timer. This timer does not need to run
* frequently as Tx buffers are usually reclaimed by new Tx packets.
*/
#define TX_RECLAIM_PERIOD (HZ / 4)
+#define TX_RECLAIM_TIMER_CHUNK 64U
+#define TX_RECLAIM_CHUNK 16U
/* WR size in bytes */
#define WR_LEN (WR_FLITS * 8)
@@ -303,21 +311,25 @@ static void free_tx_desc(struct adapter *adapter, struct sge_txq *q,
* reclaim_completed_tx - reclaims completed Tx descriptors
* @adapter: the adapter
* @q: the Tx queue to reclaim completed descriptors from
+ * @chunk: maximum number of descriptors to reclaim
*
* Reclaims Tx descriptors that the SGE has indicated it has processed,
* and frees the associated buffers if possible. Called with the Tx
* queue's lock held.
*/
-static inline void reclaim_completed_tx(struct adapter *adapter,
- struct sge_txq *q)
+static inline unsigned int reclaim_completed_tx(struct adapter *adapter,
+ struct sge_txq *q,
+ unsigned int chunk)
{
unsigned int reclaim = q->processed - q->cleaned;
+ reclaim = min(chunk, reclaim);
if (reclaim) {
free_tx_desc(adapter, q, reclaim);
q->cleaned += reclaim;
q->in_use -= reclaim;
}
+ return q->processed - q->cleaned;
}
/**
@@ -333,6 +345,18 @@ static inline int should_restart_tx(const struct sge_txq *q)
return q->in_use - r < (q->size >> 1);
}
+static void clear_rx_desc(const struct sge_fl *q, struct rx_sw_desc *d)
+{
+ if (q->use_pages) {
+ if (d->pg_chunk.page)
+ put_page(d->pg_chunk.page);
+ d->pg_chunk.page = NULL;
+ } else {
+ kfree_skb(d->skb);
+ d->skb = NULL;
+ }
+}
+
/**
* free_rx_bufs - free the Rx buffers on an SGE free list
* @pdev: the PCI device associated with the adapter
@@ -350,13 +374,7 @@ static void free_rx_bufs(struct pci_dev *pdev, struct sge_fl *q)
pci_unmap_single(pdev, pci_unmap_addr(d, dma_addr),
q->buf_size, PCI_DMA_FROMDEVICE);
- if (q->use_pages) {
- put_page(d->pg_chunk.page);
- d->pg_chunk.page = NULL;
- } else {
- kfree_skb(d->skb);
- d->skb = NULL;
- }
+ clear_rx_desc(q, d);
if (++cidx == q->size)
cidx = 0;
}
@@ -421,6 +439,14 @@ static int alloc_pg_chunk(struct sge_fl *q, struct rx_sw_desc *sd, gfp_t gfp,
return 0;
}
+static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q)
+{
+ if (q->pend_cred >= q->credits / 4) {
+ q->pend_cred = 0;
+ t3_write_reg(adap, A_SG_KDOORBELL, V_EGRCNTX(q->cntxt_id));
+ }
+}
+
/**
* refill_fl - refill an SGE free-buffer list
* @adapter: the adapter
@@ -461,10 +487,7 @@ nomem: q->alloc_failed++;
err = add_one_rx_buf(buf_start, q->buf_size, d, sd, q->gen,
adap->pdev);
if (unlikely(err)) {
- if (!q->use_pages) {
- kfree_skb(sd->skb);
- sd->skb = NULL;
- }
+ clear_rx_desc(q, sd);
break;
}
@@ -476,19 +499,19 @@ nomem: q->alloc_failed++;
sd = q->sdesc;
d = q->desc;
}
- q->credits++;
count++;
}
- wmb();
- if (likely(count))
- t3_write_reg(adap, A_SG_KDOORBELL, V_EGRCNTX(q->cntxt_id));
+
+ q->credits += count;
+ q->pend_cred += count;
+ ring_fl_db(adap, q);
return count;
}
static inline void __refill_fl(struct adapter *adap, struct sge_fl *fl)
{
- refill_fl(adap, fl, min(16U, fl->size - fl->credits),
+ refill_fl(adap, fl, min(MAX_RX_REFILL, fl->size - fl->credits),
GFP_ATOMIC | __GFP_COMP);
}
@@ -513,13 +536,15 @@ static void recycle_rx_buf(struct adapter *adap, struct sge_fl *q,
wmb();
to->len_gen = cpu_to_be32(V_FLD_GEN1(q->gen));
to->gen2 = cpu_to_be32(V_FLD_GEN2(q->gen));
- q->credits++;
if (++q->pidx == q->size) {
q->pidx = 0;
q->gen ^= 1;
}
- t3_write_reg(adap, A_SG_KDOORBELL, V_EGRCNTX(q->cntxt_id));
+
+ q->credits++;
+ q->pend_cred++;
+ ring_fl_db(adap, q);
}
/**
@@ -548,21 +573,48 @@ static void *alloc_ring(struct pci_dev *pdev, size_t nelem, size_t elem_size,
if (!p)
return NULL;
- if (sw_size) {
+ if (sw_size && metadata) {
s = kcalloc(nelem, sw_size, GFP_KERNEL);
if (!s) {
dma_free_coherent(&pdev->dev, len, p, *phys);
return NULL;
}
- }
- if (metadata)
*(void **)metadata = s;
+ }
memset(p, 0, len);
return p;
}
/**
+ * t3_reset_qset - reset a sge qset
+ * @q: the queue set
+ *
+ * Reset the qset structure.
+ * the NAPI structure is preserved in the event of
+ * the qset's reincarnation, for example during EEH recovery.
+ */
+static void t3_reset_qset(struct sge_qset *q)
+{
+ if (q->adap &&
+ !(q->adap->flags & NAPI_INIT)) {
+ memset(q, 0, sizeof(*q));
+ return;
+ }
+
+ q->adap = NULL;
+ memset(&q->rspq, 0, sizeof(q->rspq));
+ memset(q->fl, 0, sizeof(struct sge_fl) * SGE_RXQ_PER_SET);
+ memset(q->txq, 0, sizeof(struct sge_txq) * SGE_TXQ_PER_SET);
+ q->txq_stopped = 0;
+ q->tx_reclaim_timer.function = NULL; /* for t3_stop_sge_timers() */
+ q->rx_reclaim_timer.function = NULL;
+ kfree(q->lro_frag_tbl);
+ q->lro_nfrags = q->lro_frag_len = 0;
+}
+
+
+/**
* free_qset - free the resources of an SGE queue set
* @adapter: the adapter owning the queue set
* @q: the queue set
@@ -576,9 +628,6 @@ static void t3_free_qset(struct adapter *adapter, struct sge_qset *q)
int i;
struct pci_dev *pdev = adapter->pdev;
- if (q->tx_reclaim_timer.function)
- del_timer_sync(&q->tx_reclaim_timer);
-
for (i = 0; i < SGE_RXQ_PER_SET; ++i)
if (q->fl[i].desc) {
spin_lock_irq(&adapter->sge.reg_lock);
@@ -621,7 +670,7 @@ static void t3_free_qset(struct adapter *adapter, struct sge_qset *q)
if (q->netdev)
q->netdev->atalk_ptr = NULL;
- memset(q, 0, sizeof(*q));
+ t3_reset_qset(q);
}
/**
@@ -711,7 +760,9 @@ recycle:
return skb;
}
- if (unlikely(fl->credits < drop_thres))
+ if (unlikely(fl->credits < drop_thres) &&
+ refill_fl(adap, fl, min(MAX_RX_REFILL, fl->size - fl->credits - 1),
+ GFP_ATOMIC | __GFP_COMP) == 0)
goto recycle;
use_orig_buf:
@@ -791,14 +842,15 @@ recycle:
len - SGE_RX_PULL_LEN);
newskb->len = len;
newskb->data_len = len - SGE_RX_PULL_LEN;
+ newskb->truesize += newskb->data_len;
} else {
skb_fill_page_desc(newskb, skb_shinfo(newskb)->nr_frags,
sd->pg_chunk.page,
sd->pg_chunk.offset, len);
newskb->len += len;
newskb->data_len += len;
+ newskb->truesize += len;
}
- newskb->truesize += newskb->data_len;
fl->credits--;
/*
@@ -1041,7 +1093,7 @@ static void write_tx_pkt_wr(struct adapter *adap, struct sk_buff *skb,
struct tx_desc *d = &q->desc[pidx];
struct cpl_tx_pkt *cpl = (struct cpl_tx_pkt *)d;
- cpl->len = htonl(skb->len | 0x80000000);
+ cpl->len = htonl(skb->len);
cntrl = V_TXPKT_INTF(pi->port_id);
if (vlan_tx_tag_present(skb) && pi->vlan_grp)
@@ -1132,7 +1184,7 @@ int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev)
}
spin_lock(&q->lock);
- reclaim_completed_tx(adap, q);
+ reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK);
credits = q->size - q->in_use;
ndesc = calc_tx_descs(skb);
@@ -1542,7 +1594,7 @@ static int ofld_xmit(struct adapter *adap, struct sge_txq *q,
unsigned int ndesc = calc_tx_descs_ofld(skb), pidx, gen;
spin_lock(&q->lock);
- again:reclaim_completed_tx(adap, q);
+again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK);
ret = check_desc_avail(adap, q, skb, ndesc, TXQ_OFLD);
if (unlikely(ret)) {
@@ -1584,7 +1636,7 @@ static void restart_offloadq(unsigned long data)
struct adapter *adap = pi->adapter;
spin_lock(&q->lock);
- again:reclaim_completed_tx(adap, q);
+again: reclaim_completed_tx(adap, q, TX_RECLAIM_CHUNK);
while ((skb = skb_peek(&q->sendq)) != NULL) {
unsigned int gen, pidx;
@@ -1843,6 +1895,54 @@ static void restart_tx(struct sge_qset *qs)
}
/**
+ * cxgb3_arp_process - process an ARP request probing a private IP address
+ * @adapter: the adapter
+ * @skb: the skbuff containing the ARP request
+ *
+ * Check if the ARP request is probing the private IP address
+ * dedicated to iSCSI, generate an ARP reply if so.
+ */
+static void cxgb3_arp_process(struct adapter *adapter, struct sk_buff *skb)
+{
+ struct net_device *dev = skb->dev;
+ struct port_info *pi;
+ struct arphdr *arp;
+ unsigned char *arp_ptr;
+ unsigned char *sha;
+ __be32 sip, tip;
+
+ if (!dev)
+ return;
+
+ skb_reset_network_header(skb);
+ arp = arp_hdr(skb);
+
+ if (arp->ar_op != htons(ARPOP_REQUEST))
+ return;
+
+ arp_ptr = (unsigned char *)(arp + 1);
+ sha = arp_ptr;
+ arp_ptr += dev->addr_len;
+ memcpy(&sip, arp_ptr, sizeof(sip));
+ arp_ptr += sizeof(sip);
+ arp_ptr += dev->addr_len;
+ memcpy(&tip, arp_ptr, sizeof(tip));
+
+ pi = netdev_priv(dev);
+ if (tip != pi->iscsi_ipv4addr)
+ return;
+
+ arp_send(ARPOP_REPLY, ETH_P_ARP, sip, dev, tip, sha,
+ dev->dev_addr, sha);
+
+}
+
+static inline int is_arp(struct sk_buff *skb)
+{
+ return skb->protocol == htons(ETH_P_ARP);
+}
+
+/**
* rx_eth - process an ingress ethernet packet
* @adap: the adapter
* @rq: the response queue that received the packet
@@ -1854,18 +1954,19 @@ static void restart_tx(struct sge_qset *qs)
* if it was immediate data in a response.
*/
static void rx_eth(struct adapter *adap, struct sge_rspq *rq,
- struct sk_buff *skb, int pad)
+ struct sk_buff *skb, int pad, int lro)
{
struct cpl_rx_pkt *p = (struct cpl_rx_pkt *)(skb->data + pad);
+ struct sge_qset *qs = rspq_to_qset(rq);
struct port_info *pi;
skb_pull(skb, sizeof(*p) + pad);
skb->protocol = eth_type_trans(skb, adap->port[p->iff]);
skb->dev->last_rx = jiffies;
pi = netdev_priv(skb->dev);
- if (pi->rx_csum_offload && p->csum_valid && p->csum == htons(0xffff) &&
+ if ((pi->rx_offload & T3_RX_CSUM) && p->csum_valid && p->csum == htons(0xffff) &&
!p->fragment) {
- rspq_to_qset(rq)->port_stats[SGE_PSTAT_RX_CSUM_GOOD]++;
+ qs->port_stats[SGE_PSTAT_RX_CSUM_GOOD]++;
skb->ip_summed = CHECKSUM_UNNECESSARY;
} else
skb->ip_summed = CHECKSUM_NONE;
@@ -1873,18 +1974,184 @@ static void rx_eth(struct adapter *adap, struct sge_rspq *rq,
if (unlikely(p->vlan_valid)) {
struct vlan_group *grp = pi->vlan_grp;
- rspq_to_qset(rq)->port_stats[SGE_PSTAT_VLANEX]++;
+ qs->port_stats[SGE_PSTAT_VLANEX]++;
if (likely(grp))
- __vlan_hwaccel_rx(skb, grp, ntohs(p->vlan),
- rq->polling);
+ if (lro)
+ lro_vlan_hwaccel_receive_skb(&qs->lro_mgr, skb,
+ grp,
+ ntohs(p->vlan),
+ p);
+ else {
+ if (unlikely(pi->iscsi_ipv4addr &&
+ is_arp(skb))) {
+ unsigned short vtag = ntohs(p->vlan) &
+ VLAN_VID_MASK;
+ skb->dev = vlan_group_get_device(grp,
+ vtag);
+ cxgb3_arp_process(adap, skb);
+ }
+ __vlan_hwaccel_rx(skb, grp, ntohs(p->vlan),
+ rq->polling);
+ }
else
dev_kfree_skb_any(skb);
- } else if (rq->polling)
- netif_receive_skb(skb);
- else
+ } else if (rq->polling) {
+ if (lro)
+ lro_receive_skb(&qs->lro_mgr, skb, p);
+ else {
+ if (unlikely(pi->iscsi_ipv4addr && is_arp(skb)))
+ cxgb3_arp_process(adap, skb);
+ netif_receive_skb(skb);
+ }
+ } else
netif_rx(skb);
}
+static inline int is_eth_tcp(u32 rss)
+{
+ return G_HASHTYPE(ntohl(rss)) == RSS_HASH_4_TUPLE;
+}
+
+/**
+ * lro_frame_ok - check if an ingress packet is eligible for LRO
+ * @p: the CPL header of the packet
+ *
+ * Returns true if a received packet is eligible for LRO.
+ * The following conditions must be true:
+ * - packet is TCP/IP Ethernet II (checked elsewhere)
+ * - not an IP fragment
+ * - no IP options
+ * - TCP/IP checksums are correct
+ * - the packet is for this host
+ */
+static inline int lro_frame_ok(const struct cpl_rx_pkt *p)
+{
+ const struct ethhdr *eh = (struct ethhdr *)(p + 1);
+ const struct iphdr *ih = (struct iphdr *)(eh + 1);
+
+ return (*((u8 *)p + 1) & 0x90) == 0x10 && p->csum == htons(0xffff) &&
+ eh->h_proto == htons(ETH_P_IP) && ih->ihl == (sizeof(*ih) >> 2);
+}
+
+static int t3_get_lro_header(void **eh, void **iph, void **tcph,
+ u64 *hdr_flags, void *priv)
+{
+ const struct cpl_rx_pkt *cpl = priv;
+
+ if (!lro_frame_ok(cpl))
+ return -1;
+
+ *eh = (struct ethhdr *)(cpl + 1);
+ *iph = (struct iphdr *)((struct ethhdr *)*eh + 1);
+ *tcph = (struct tcphdr *)((struct iphdr *)*iph + 1);
+
+ *hdr_flags = LRO_IPV4 | LRO_TCP;
+ return 0;
+}
+
+static int t3_get_skb_header(struct sk_buff *skb,
+ void **iph, void **tcph, u64 *hdr_flags,
+ void *priv)
+{
+ void *eh;
+
+ return t3_get_lro_header(&eh, iph, tcph, hdr_flags, priv);
+}
+
+static int t3_get_frag_header(struct skb_frag_struct *frag, void **eh,
+ void **iph, void **tcph, u64 *hdr_flags,
+ void *priv)
+{
+ return t3_get_lro_header(eh, iph, tcph, hdr_flags, priv);
+}
+
+/**
+ * lro_add_page - add a page chunk to an LRO session
+ * @adap: the adapter
+ * @qs: the associated queue set
+ * @fl: the free list containing the page chunk to add
+ * @len: packet length
+ * @complete: Indicates the last fragment of a frame
+ *
+ * Add a received packet contained in a page chunk to an existing LRO
+ * session.
+ */
+static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
+ struct sge_fl *fl, int len, int complete)
+{
+ struct rx_sw_desc *sd = &fl->sdesc[fl->cidx];
+ struct cpl_rx_pkt *cpl;
+ struct skb_frag_struct *rx_frag = qs->lro_frag_tbl;
+ int nr_frags = qs->lro_nfrags, frag_len = qs->lro_frag_len;
+ int offset = 0;
+
+ if (!nr_frags) {
+ offset = 2 + sizeof(struct cpl_rx_pkt);
+ qs->lro_va = cpl = sd->pg_chunk.va + 2;
+ }
+
+ fl->credits--;
+
+ len -= offset;
+ pci_unmap_single(adap->pdev, pci_unmap_addr(sd, dma_addr),
+ fl->buf_size, PCI_DMA_FROMDEVICE);
+
+ rx_frag += nr_frags;
+ rx_frag->page = sd->pg_chunk.page;
+ rx_frag->page_offset = sd->pg_chunk.offset + offset;
+ rx_frag->size = len;
+ frag_len += len;
+ qs->lro_nfrags++;
+ qs->lro_frag_len = frag_len;
+
+ if (!complete)
+ return;
+
+ qs->lro_nfrags = qs->lro_frag_len = 0;
+ cpl = qs->lro_va;
+
+ if (unlikely(cpl->vlan_valid)) {
+ struct net_device *dev = qs->netdev;
+ struct port_info *pi = netdev_priv(dev);
+ struct vlan_group *grp = pi->vlan_grp;
+
+ if (likely(grp != NULL)) {
+ lro_vlan_hwaccel_receive_frags(&qs->lro_mgr,
+ qs->lro_frag_tbl,
+ frag_len, frag_len,
+ grp, ntohs(cpl->vlan),
+ cpl, 0);
+ return;
+ }
+ }
+ lro_receive_frags(&qs->lro_mgr, qs->lro_frag_tbl,
+ frag_len, frag_len, cpl, 0);
+}
+
+/**
+ * init_lro_mgr - initialize a LRO manager object
+ * @lro_mgr: the LRO manager object
+ */
+static void init_lro_mgr(struct sge_qset *qs, struct net_lro_mgr *lro_mgr)
+{
+ struct adapter *adapter = qs->adap;
+ struct net_device *dev = qs->netdev;
+ struct port_info *pi = netdev_priv(dev);
+
+ lro_mgr->dev = adapter->port[pi->port_id];
+ lro_mgr->features = LRO_F_NAPI;
+ lro_mgr->frag_align_pad = NET_IP_ALIGN;
+ lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
+ lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
+ lro_mgr->max_desc = T3_MAX_LRO_SES;
+ lro_mgr->lro_arr = qs->lro_desc;
+ lro_mgr->get_frag_header = t3_get_frag_header;
+ lro_mgr->get_skb_header = t3_get_skb_header;
+ lro_mgr->max_aggr = T3_MAX_LRO_MAX_PKTS;
+ if (lro_mgr->max_aggr > MAX_SKB_FRAGS)
+ lro_mgr->max_aggr = MAX_SKB_FRAGS;
+}
+
/**
* handle_rsp_cntrl_info - handles control information in a response
* @qs: the queue set corresponding to the response
@@ -2013,7 +2280,7 @@ static int process_responses(struct adapter *adap, struct sge_qset *qs,
q->next_holdoff = q->holdoff_tmr;
while (likely(budget_left && is_new_response(r, q))) {
- int packet_complete, eth, ethpad = 2;
+ int packet_complete, eth, ethpad = 2, lro = qs->lro_enabled;
struct sk_buff *skb = NULL;
u32 len, flags = ntohl(r->flags);
__be32 rss_hi = *(const __be32 *)r,
@@ -2045,6 +2312,8 @@ no_mem:
} else if ((len = ntohl(r->len_cq)) != 0) {
struct sge_fl *fl;
+ lro &= eth && is_eth_tcp(rss_hi);
+
fl = (len & F_RSPD_FLQ) ? &qs->fl[1] : &qs->fl[0];
if (fl->use_pages) {
void *addr = fl->sdesc[fl->cidx].pg_chunk.va;
@@ -2054,6 +2323,12 @@ no_mem:
prefetch(addr + L1_CACHE_BYTES);
#endif
__refill_fl(adap, fl);
+ if (lro > 0) {
+ lro_add_page(adap, qs, fl,
+ G_RSPD_LEN(len),
+ flags & F_RSPD_EOP);
+ goto next_fl;
+ }
skb = get_packet_pg(adap, fl, q,
G_RSPD_LEN(len),
@@ -2069,7 +2344,7 @@ no_mem:
q->rx_drops++;
} else if (unlikely(r->rss_hdr.opcode == CPL_TRACE_PKT))
__skb_pull(skb, 2);
-
+next_fl:
if (++fl->cidx == fl->size)
fl->cidx = 0;
} else
@@ -2099,7 +2374,7 @@ no_mem:
if (skb != NULL && packet_complete) {
if (eth)
- rx_eth(adap, q, skb, ethpad);
+ rx_eth(adap, q, skb, ethpad, lro);
else {
q->offload_pkts++;
/* Preserve the RSS info in csum & priority */
@@ -2117,6 +2392,11 @@ no_mem:
}
deliver_partial_bundle(&adap->tdev, q, offload_skbs, ngathered);
+ lro_flush_all(&qs->lro_mgr);
+ qs->port_stats[SGE_PSTAT_LRO_AGGR] = qs->lro_mgr.stats.aggregated;
+ qs->port_stats[SGE_PSTAT_LRO_FLUSHED] = qs->lro_mgr.stats.flushed;
+ qs->port_stats[SGE_PSTAT_LRO_NO_DESC] = qs->lro_mgr.stats.no_desc;
+
if (sleeping)
check_ring_db(adap, qs, sleeping);
@@ -2130,7 +2410,7 @@ no_mem:
static inline int is_pure_response(const struct rsp_desc *r)
{
- u32 n = ntohl(r->flags) & (F_RSPD_ASYNC_NOTIF | F_RSPD_IMM_DATA_VALID);
+ __be32 n = r->flags & htonl(F_RSPD_ASYNC_NOTIF | F_RSPD_IMM_DATA_VALID);
return (n | r->len_cq) == 0;
}
@@ -2544,7 +2824,8 @@ irq_handler_t t3_intr_handler(struct adapter *adap, int polling)
*/
void t3_sge_err_intr_handler(struct adapter *adapter)
{
- unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE);
+ unsigned int v, status = t3_read_reg(adapter, A_SG_INT_CAUSE) &
+ ~F_FLEMPTY;
if (status & SGE_PARERR)
CH_ALERT(adapter, "SGE parity error (0x%x)\n",
@@ -2574,13 +2855,13 @@ void t3_sge_err_intr_handler(struct adapter *adapter)
}
/**
- * sge_timer_cb - perform periodic maintenance of an SGE qset
+ * sge_timer_tx - perform periodic maintenance of an SGE qset
* @data: the SGE queue set to maintain
*
* Runs periodically from a timer to perform maintenance of an SGE queue
* set. It performs two tasks:
*
- * a) Cleans up any completed Tx descriptors that may still be pending.
+ * Cleans up any completed Tx descriptors that may still be pending.
* Normal descriptor cleanup happens when new packets are added to a Tx
* queue so this timer is relatively infrequent and does any cleanup only
* if the Tx queue has not seen any new packets in a while. We make a
@@ -2589,53 +2870,87 @@ void t3_sge_err_intr_handler(struct adapter *adapter)
* someone else is queueing new packets and so will also handle the clean
* up). Since control queues use immediate data exclusively we don't
* bother cleaning them up here.
- *
- * b) Replenishes Rx queues that have run out due to memory shortage.
- * Normally new Rx buffers are added when existing ones are consumed but
- * when out of memory a queue can become empty. We try to add only a few
- * buffers here, the queue will be replenished fully as these new buffers
- * are used up if memory shortage has subsided.
*/
-static void sge_timer_cb(unsigned long data)
+static void sge_timer_tx(unsigned long data)
{
- spinlock_t *lock;
struct sge_qset *qs = (struct sge_qset *)data;
const struct port_info *pi = netdev_priv(qs->netdev);
struct adapter *adap = pi->adapter;
+ unsigned int tbd[SGE_TXQ_PER_SET] = {0, 0};
+ unsigned long next_period;
if (spin_trylock(&qs->txq[TXQ_ETH].lock)) {
- reclaim_completed_tx(adap, &qs->txq[TXQ_ETH]);
+ tbd[TXQ_ETH] = reclaim_completed_tx(adap, &qs->txq[TXQ_ETH],
+ TX_RECLAIM_TIMER_CHUNK);
spin_unlock(&qs->txq[TXQ_ETH].lock);
}
if (spin_trylock(&qs->txq[TXQ_OFLD].lock)) {
- reclaim_completed_tx(adap, &qs->txq[TXQ_OFLD]);
+ tbd[TXQ_OFLD] = reclaim_completed_tx(adap, &qs->txq[TXQ_OFLD],
+ TX_RECLAIM_TIMER_CHUNK);
spin_unlock(&qs->txq[TXQ_OFLD].lock);
}
- lock = (adap->flags & USING_MSIX) ? &qs->rspq.lock :
- &adap->sge.qs[0].rspq.lock;
- if (spin_trylock_irq(lock)) {
- if (!napi_is_scheduled(qs->netdev)) {
- u32 status = t3_read_reg(adap, A_SG_RSPQ_FL_STATUS);
-
- if (qs->fl[0].credits < qs->fl[0].size)
- __refill_fl(adap, &qs->fl[0]);
- if (qs->fl[1].credits < qs->fl[1].size)
- __refill_fl(adap, &qs->fl[1]);
-
- if (status & (1 << qs->rspq.cntxt_id)) {
- qs->rspq.starved++;
- if (qs->rspq.credits) {
- refill_rspq(adap, &qs->rspq, 1);
- qs->rspq.credits--;
- qs->rspq.restarted++;
- t3_write_reg(adap, A_SG_RSPQ_FL_STATUS,
- 1 << qs->rspq.cntxt_id);
- }
+
+ next_period = TX_RECLAIM_PERIOD >>
+ (max(tbd[TXQ_ETH], tbd[TXQ_OFLD]) /
+ TX_RECLAIM_TIMER_CHUNK);
+ mod_timer(&qs->tx_reclaim_timer, jiffies + next_period);
+}
+
+/*
+ * sge_timer_rx - perform periodic maintenance of an SGE qset
+ * @data: the SGE queue set to maintain
+ *
+ * a) Replenishes Rx queues that have run out due to memory shortage.
+ * Normally new Rx buffers are added when existing ones are consumed but
+ * when out of memory a queue can become empty. We try to add only a few
+ * buffers here, the queue will be replenished fully as these new buffers
+ * are used up if memory shortage has subsided.
+ *
+ * b) Return coalesced response queue credits in case a response queue is
+ * starved.
+ *
+ */
+static void sge_timer_rx(unsigned long data)
+{
+ spinlock_t *lock;
+ struct sge_qset *qs = (struct sge_qset *)data;
+ struct port_info *pi = netdev_priv(qs->netdev);
+ struct adapter *adap = pi->adapter;
+ u32 status;
+
+ lock = adap->params.rev > 0 ?
+ &qs->rspq.lock : &adap->sge.qs[0].rspq.lock;
+
+ if (!spin_trylock_irq(lock))
+ goto out;
+
+ if (napi_is_scheduled(qs->netdev))
+ goto unlock;
+
+ if (adap->params.rev < 4) {
+ status = t3_read_reg(adap, A_SG_RSPQ_FL_STATUS);
+
+ if (status & (1 << qs->rspq.cntxt_id)) {
+ qs->rspq.starved++;
+ if (qs->rspq.credits) {
+ qs->rspq.credits--;
+ refill_rspq(adap, &qs->rspq, 1);
+ qs->rspq.restarted++;
+ t3_write_reg(adap, A_SG_RSPQ_FL_STATUS,
+ 1 << qs->rspq.cntxt_id);
}
}
- spin_unlock_irq(lock);
}
- mod_timer(&qs->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD);
+
+ if (qs->fl[0].credits < qs->fl[0].size)
+ __refill_fl(adap, &qs->fl[0]);
+ if (qs->fl[1].credits < qs->fl[1].size)
+ __refill_fl(adap, &qs->fl[1]);
+
+unlock:
+ spin_unlock_irq(lock);
+out:
+ mod_timer(&qs->rx_reclaim_timer, jiffies + RX_RECLAIM_PERIOD);
}
/**
@@ -2677,11 +2992,11 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
{
int i, avail, ret = -ENOMEM;
struct sge_qset *q = &adapter->sge.qs[id];
+ struct net_lro_mgr *lro_mgr = &q->lro_mgr;
init_qset_cntxt(q, id);
- init_timer(&q->tx_reclaim_timer);
- q->tx_reclaim_timer.data = (unsigned long)q;
- q->tx_reclaim_timer.function = sge_timer_cb;
+ setup_timer(&q->tx_reclaim_timer, sge_timer_tx, (unsigned long)q);
+ setup_timer(&q->rx_reclaim_timer, sge_timer_rx, (unsigned long)q);
q->fl[0].desc = alloc_ring(adapter->pdev, p->fl_size,
sizeof(struct rx_desc),
@@ -2757,6 +3072,10 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
q->fl[0].order = FL0_PG_ORDER;
q->fl[1].order = FL1_PG_ORDER;
+ q->lro_frag_tbl = kcalloc(MAX_FRAME_SIZE / FL1_PG_CHUNK_SIZE + 1,
+ sizeof(struct skb_frag_struct),
+ GFP_KERNEL);
+ q->lro_nfrags = q->lro_frag_len = 0;
spin_lock_irq(&adapter->sge.reg_lock);
/* FL threshold comparison uses < */
@@ -2802,16 +3121,20 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
}
spin_unlock_irq(&adapter->sge.reg_lock);
+
+ q->adap = adapter;
q->netdev = netdev;
t3_update_qset_coalesce(q, p);
- /*
- * We use atalk_ptr as a backpointer to a qset. In case a device is
- * associated with multiple queue sets only the first one sets
- * atalk_ptr.
- */
- if (netdev->atalk_ptr == NULL)
- netdev->atalk_ptr = q;
+ /*
+ * We use atalk_ptr as a backpointer to a qset. In case a device is
+ * associated with multiple queue sets only the first one sets
+ * atalk_ptr.
+ */
+ if (netdev->atalk_ptr == NULL)
+ netdev->atalk_ptr = q;
+
+ init_lro_mgr(q, lro_mgr);
avail = refill_fl(adapter, &q->fl[0], q->fl[0].size,
GFP_KERNEL | __GFP_COMP);
@@ -2833,7 +3156,6 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
t3_write_reg(adapter, A_SG_GTS, V_RSPQ(q->rspq.cntxt_id) |
V_NEWTIMER(q->rspq.holdoff_tmr));
- mod_timer(&q->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD);
return 0;
err_unlock:
@@ -2844,6 +3166,47 @@ err:
}
/**
+ * t3_start_sge_timers - start SGE timer call backs
+ * @adap: the adapter
+ *
+ * Starts each SGE queue set's timer call back
+ */
+void t3_start_sge_timers(struct adapter *adap)
+{
+ int i;
+
+ for (i = 0; i < SGE_QSETS; ++i) {
+ struct sge_qset *q = &adap->sge.qs[i];
+
+ if (q->tx_reclaim_timer.function)
+ mod_timer(&q->tx_reclaim_timer, jiffies + TX_RECLAIM_PERIOD);
+
+ if (q->rx_reclaim_timer.function)
+ mod_timer(&q->rx_reclaim_timer, jiffies + RX_RECLAIM_PERIOD);
+ }
+}
+
+/**
+ * t3_stop_sge_timers - stop SGE timer call backs
+ * @adap: the adapter
+ *
+ * Stops each SGE queue set's timer call back
+ */
+void t3_stop_sge_timers(struct adapter *adap)
+{
+ int i;
+
+ for (i = 0; i < SGE_QSETS; ++i) {
+ struct sge_qset *q = &adap->sge.qs[i];
+
+ if (q->tx_reclaim_timer.function)
+ del_timer_sync(&q->tx_reclaim_timer);
+ if (q->rx_reclaim_timer.function)
+ del_timer_sync(&q->rx_reclaim_timer);
+ }
+}
+
+/**
* t3_free_sge_resources - free SGE resources
* @adap: the adapter
*
diff --git a/drivers/net/cxgb3/t3_cpl.h b/drivers/net/cxgb3/t3_cpl.h
index 030a8cb..852c399 100644
--- a/drivers/net/cxgb3/t3_cpl.h
+++ b/drivers/net/cxgb3/t3_cpl.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2004-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -174,6 +174,13 @@ enum { /* TCP congestion control algorithms */
CONG_ALG_HIGHSPEED
};
+enum { /* RSS hash type */
+ RSS_HASH_NONE = 0,
+ RSS_HASH_2_TUPLE = 1,
+ RSS_HASH_4_TUPLE = 2,
+ RSS_HASH_TCPV6 = 3
+};
+
union opcode_tid {
__be32 opcode_tid;
__u8 opcode;
@@ -187,6 +194,10 @@ union opcode_tid {
#define S_QNUM 0
#define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF)
+#define S_HASHTYPE 22
+#define M_HASHTYPE 0x3
+#define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE)
+
/* tid is assumed to be 24-bits */
#define MK_OPCODE_TID(opcode, tid) (V_OPCODE(opcode) | (tid))
diff --git a/drivers/net/cxgb3/t3_firmware.h b/drivers/net/cxgb3/t3_firmware.h
index f2d15b1..180d8c3 100644
--- a/drivers/net/cxgb3/t3_firmware.h
+++ b/drivers/net/cxgb3/t3_firmware.h
@@ -36,16 +36,16 @@
* hexdump -v -e '"\t" 16/1 "0x%02x, " "\n"'
*/
-/* contents of t3fw-6.0.0.bin */
+/* contents of t3fw-7.1.0.bin */
static u8 t3fw_data[] = {
0x60, 0x00, 0x74, 0x00, 0x20, 0x03, 0x80, 0x00, 0x20, 0x03, 0x70, 0x00, 0x00, 0x00, 0x10, 0x00,
0x00, 0x00, 0x20, 0x00, 0xe1, 0x00, 0x02, 0x84, 0x00, 0x07, 0x00, 0x00, 0xe1, 0x00, 0x02, 0x88,
0x00, 0x01, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0xa0, 0x01, 0x00, 0x00, 0x00,
0x44, 0x44, 0x44, 0x40, 0xe3, 0x00, 0x01, 0x83, 0x20, 0x02, 0x00, 0x00, 0x20, 0x01, 0xe0, 0x00,
0x20, 0x01, 0xff, 0x10, 0x1f, 0xff, 0xd0, 0x00, 0x1f, 0xff, 0xc0, 0x00, 0xe3, 0x00, 0x04, 0x3c,
- 0x02, 0x00, 0x00, 0x00, 0x20, 0x00, 0x59, 0xa0, 0x1f, 0xff, 0xc4, 0xc0, 0x20, 0x00, 0x59, 0xe8,
- 0x1f, 0xff, 0xc4, 0xc4, 0x20, 0x00, 0x5a, 0x28, 0x1f, 0xff, 0xc4, 0xc8, 0x20, 0x00, 0x5a, 0x9c,
- 0x1f, 0xff, 0xc4, 0xcc, 0x20, 0x00, 0x03, 0xc0, 0xc0, 0x00, 0x00, 0xe4, 0x31, 0x00, 0xea, 0x31,
+ 0x02, 0x00, 0x00, 0x00, 0x20, 0x00, 0x69, 0x88, 0x1f, 0xff, 0xc2, 0x90, 0x20, 0x00, 0x69, 0xd0,
+ 0x1f, 0xff, 0xc2, 0x94, 0x20, 0x00, 0x6a, 0x10, 0x1f, 0xff, 0xc2, 0x98, 0x20, 0x00, 0x6a, 0x84,
+ 0x1f, 0xff, 0xc2, 0x9c, 0x20, 0x00, 0x03, 0xc0, 0xc0, 0x00, 0x00, 0xe4, 0x31, 0x00, 0xea, 0x31,
0x00, 0xa1, 0x31, 0x00, 0xa0, 0x31, 0x03, 0x02, 0x00, 0x02, 0xed, 0x30, 0x6e, 0x2a, 0x05, 0x00,
0xed, 0x31, 0x00, 0x02, 0x00, 0x02, 0x16, 0x00, 0x12, 0xff, 0xdb, 0xc0, 0x30, 0x14, 0xff, 0xda,
0xd3, 0x0f, 0xd3, 0x0f, 0xd3, 0x0f, 0x03, 0x43, 0x1f, 0x24, 0x4c, 0x10, 0x72, 0x49, 0xf0, 0xd3,
@@ -61,18 +61,18 @@ static u8 t3fw_data[] = {
0x00, 0x93, 0x20, 0x12, 0xff, 0xb8, 0xc0, 0x31, 0x93, 0x20, 0x82, 0x20, 0x12, 0xff, 0xb7, 0x13,
0xff, 0xb7, 0x93, 0x20, 0x12, 0xff, 0xb7, 0x15, 0xff, 0xb3, 0x16, 0xff, 0xb6, 0xc0, 0x30, 0xd7,
0x20, 0x05, 0x66, 0x01, 0x60, 0x00, 0x1b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x04, 0x36, 0x05, 0x00, 0x02, 0x00, 0xd3, 0x0f, 0xd3, 0x0f, 0x75, 0x31, 0x14, 0x07, 0x47, 0x14,
- 0x05, 0x33, 0x0c, 0x07, 0x04, 0x43, 0x76, 0x31, 0xe6, 0x04, 0x36, 0x05, 0x75, 0x39, 0xed, 0x00,
- 0x02, 0x00, 0x12, 0xff, 0xa7, 0x15, 0xff, 0xa3, 0xc0, 0x30, 0xd7, 0x20, 0x60, 0x00, 0x06, 0x00,
- 0x07, 0x47, 0x14, 0x05, 0x33, 0x0c, 0x07, 0x04, 0x43, 0x04, 0x3e, 0x05, 0x75, 0x39, 0xf0, 0x03,
+ 0x04, 0x36, 0x05, 0x00, 0x02, 0x00, 0xd3, 0x0f, 0xd3, 0x0f, 0x05, 0x33, 0x0c, 0x6e, 0x3b, 0x14,
+ 0x07, 0x47, 0x14, 0x07, 0x04, 0x43, 0x76, 0x31, 0xe6, 0x04, 0x36, 0x05, 0x05, 0x33, 0x0c, 0x6f,
+ 0x3b, 0xed, 0x00, 0x02, 0x00, 0x12, 0xff, 0xa6, 0x15, 0xff, 0xa3, 0x23, 0x0a, 0x00, 0xd7, 0x20,
+ 0x07, 0x04, 0x43, 0x04, 0x3e, 0x05, 0x05, 0x33, 0x0c, 0x07, 0x47, 0x14, 0x6f, 0x3b, 0xf0, 0x03,
0x02, 0x00, 0x12, 0xff, 0xa1, 0xc0, 0x30, 0x14, 0xff, 0xa1, 0xd3, 0x0f, 0xd3, 0x0f, 0xd3, 0x0f,
0x93, 0x40, 0xb4, 0x44, 0x72, 0x49, 0xf2, 0xd3, 0x0f, 0xd3, 0x0f, 0xd3, 0x0f, 0x14, 0xff, 0x9b,
0x83, 0x40, 0x14, 0xff, 0x9b, 0x83, 0x40, 0x12, 0xff, 0x9b, 0x23, 0x0a, 0x00, 0x14, 0xff, 0x9a,
0xd3, 0x0f, 0xd3, 0x0f, 0xd3, 0x0f, 0x93, 0x40, 0xb4, 0x44, 0x72, 0x49, 0xf2, 0xd3, 0x0f, 0xd3,
- 0x0f, 0xd3, 0x0f, 0x14, 0xff, 0x95, 0x83, 0x40, 0x12, 0xff, 0x95, 0xca, 0x20, 0x83, 0x20, 0x84,
- 0x21, 0x85, 0x22, 0xbc, 0x22, 0x74, 0x3b, 0x10, 0x86, 0x50, 0xb4, 0x55, 0x96, 0x30, 0xb4, 0x33,
- 0x74, 0x33, 0xf4, 0x63, 0xff, 0xe6, 0x00, 0x00, 0x00, 0x65, 0x3f, 0xe0, 0x65, 0x5f, 0xdd, 0x12,
- 0xff, 0x7c, 0xc0, 0x30, 0x28, 0x37, 0x40, 0x28, 0x37, 0x44, 0x28, 0x37, 0x48, 0x28, 0x37, 0x4c,
+ 0x0f, 0xd3, 0x0f, 0x14, 0xff, 0x95, 0x83, 0x40, 0x12, 0xff, 0x95, 0xc9, 0x2f, 0x83, 0x20, 0x84,
+ 0x21, 0x85, 0x22, 0xbc, 0x22, 0x74, 0x3b, 0x0f, 0x86, 0x50, 0xb4, 0x55, 0x96, 0x30, 0xb4, 0x33,
+ 0x74, 0x33, 0xf4, 0x63, 0xff, 0xe6, 0x00, 0x00, 0x65, 0x3f, 0xe1, 0x65, 0x5f, 0xde, 0x12, 0xff,
+ 0x7c, 0x23, 0x0a, 0x00, 0x28, 0x37, 0x40, 0x28, 0x37, 0x44, 0x28, 0x37, 0x48, 0x28, 0x37, 0x4c,
0x23, 0x3d, 0x01, 0x72, 0x33, 0xed, 0x03, 0x02, 0x00, 0x00, 0x02, 0x00, 0x12, 0xff, 0x7a, 0xc0,
0x32, 0x03, 0x2e, 0x05, 0x03, 0x02, 0x00, 0x12, 0xff, 0x78, 0x13, 0xff, 0x81, 0x93, 0x20, 0xc0,
0x11, 0x01, 0x49, 0x31, 0x00, 0x48, 0x31, 0x01, 0x02, 0x00, 0xc0, 0x00, 0x14, 0xff, 0x7e, 0x04,
@@ -110,826 +110,1094 @@ static u8 t3fw_data[] = {
0xe3, 0x00, 0x05, 0xc8, 0x1f, 0xfc, 0x00, 0x00, 0x1f, 0xfc, 0x00, 0x00, 0xe3, 0x00, 0x05, 0xc8,
0x1f, 0xff, 0xc0, 0x00, 0x1f, 0xff, 0xc0, 0x00, 0xe3, 0x00, 0x05, 0xc8, 0x1f, 0xff, 0xc0, 0x00,
0x1f, 0xff, 0xc0, 0x18, 0xe3, 0x00, 0x05, 0xc8, 0x1f, 0xff, 0xc0, 0x18, 0x1f, 0xff, 0xc0, 0x18,
- 0xe3, 0x00, 0x05, 0xe0, 0x1f, 0xff, 0xc0, 0x18, 0x1f, 0xff, 0xc2, 0x48, 0xe3, 0x00, 0x05, 0xe0,
- 0x1f, 0xff, 0xc2, 0x48, 0x1f, 0xff, 0xc2, 0x48, 0xe3, 0x00, 0x08, 0x10, 0x1f, 0xff, 0xc2, 0x50,
- 0x1f, 0xff, 0xc4, 0xbc, 0xe3, 0x00, 0x08, 0x10, 0x20, 0x00, 0x00, 0x00, 0x20, 0x00, 0x01, 0x6a,
- 0xe3, 0x00, 0x0a, 0x7c, 0x20, 0x00, 0x01, 0x80, 0x20, 0x00, 0x01, 0x80, 0xe3, 0x00, 0x0b, 0xe8,
- 0x20, 0x00, 0x02, 0x00, 0x20, 0x00, 0x02, 0x03, 0xe3, 0x00, 0x0b, 0xe8, 0x20, 0x00, 0x02, 0x1c,
- 0x20, 0x00, 0x02, 0x20, 0xe3, 0x00, 0x0b, 0xec, 0x20, 0x00, 0x02, 0x20, 0x20, 0x00, 0x02, 0x26,
- 0xe3, 0x00, 0x0b, 0xf0, 0x20, 0x00, 0x02, 0x3c, 0x20, 0x00, 0x02, 0x40, 0xe3, 0x00, 0x0b, 0xf8,
- 0x20, 0x00, 0x02, 0x40, 0x20, 0x00, 0x02, 0x49, 0xe3, 0x00, 0x0b, 0xfc, 0x20, 0x00, 0x02, 0x4c,
- 0x20, 0x00, 0x02, 0x50, 0xe3, 0x00, 0x0c, 0x08, 0x20, 0x00, 0x02, 0x50, 0x20, 0x00, 0x02, 0x59,
- 0xe3, 0x00, 0x0c, 0x0c, 0x20, 0x00, 0x02, 0x5c, 0x20, 0x00, 0x02, 0x60, 0xe3, 0x00, 0x0c, 0x18,
- 0x20, 0x00, 0x02, 0x60, 0x20, 0x00, 0x02, 0x69, 0xe3, 0x00, 0x0c, 0x1c, 0x20, 0x00, 0x02, 0x6c,
- 0x20, 0x00, 0x02, 0x70, 0xe3, 0x00, 0x0c, 0x28, 0x20, 0x00, 0x02, 0x70, 0x20, 0x00, 0x02, 0x79,
- 0xe3, 0x00, 0x0c, 0x2c, 0x20, 0x00, 0x02, 0x8c, 0x20, 0x00, 0x02, 0x8c, 0xe3, 0x00, 0x0c, 0x38,
- 0x20, 0x00, 0x02, 0x90, 0x20, 0x00, 0x02, 0x93, 0xe3, 0x00, 0x0c, 0x38, 0x20, 0x00, 0x02, 0xac,
- 0x20, 0x00, 0x02, 0xb0, 0xe3, 0x00, 0x0c, 0x3c, 0x20, 0x00, 0x02, 0xd0, 0x20, 0x00, 0x02, 0xf2,
- 0xe3, 0x00, 0x0c, 0x40, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0c, 0x64,
- 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0c, 0x64, 0x20, 0x00, 0x03, 0xb0,
- 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0c, 0x64, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0,
- 0xe3, 0x00, 0x0c, 0x64, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x5b, 0xc0, 0xe3, 0x00, 0x0c, 0x64,
- 0x20, 0x00, 0x5b, 0xc0, 0x20, 0x00, 0x5b, 0xc0, 0xe3, 0x00, 0x64, 0x74, 0x00, 0x00, 0x00, 0x00,
+ 0xe3, 0x00, 0x05, 0xe0, 0x1f, 0xff, 0xc0, 0x18, 0x1f, 0xff, 0xc2, 0x8c, 0xe3, 0x00, 0x05, 0xe0,
+ 0x1f, 0xff, 0xc2, 0x8c, 0x1f, 0xff, 0xc2, 0x8c, 0xe3, 0x00, 0x08, 0x54, 0x1f, 0xff, 0xc2, 0x90,
+ 0x1f, 0xff, 0xc5, 0x8c, 0xe3, 0x00, 0x08, 0x54, 0x20, 0x00, 0x00, 0x00, 0x20, 0x00, 0x01, 0x6a,
+ 0xe3, 0x00, 0x0b, 0x50, 0x20, 0x00, 0x01, 0x80, 0x20, 0x00, 0x01, 0x80, 0xe3, 0x00, 0x0c, 0xbc,
+ 0x20, 0x00, 0x02, 0x00, 0x20, 0x00, 0x02, 0x03, 0xe3, 0x00, 0x0c, 0xbc, 0x20, 0x00, 0x02, 0x1c,
+ 0x20, 0x00, 0x02, 0x20, 0xe3, 0x00, 0x0c, 0xc0, 0x20, 0x00, 0x02, 0x20, 0x20, 0x00, 0x02, 0x26,
+ 0xe3, 0x00, 0x0c, 0xc4, 0x20, 0x00, 0x02, 0x3c, 0x20, 0x00, 0x02, 0x40, 0xe3, 0x00, 0x0c, 0xcc,
+ 0x20, 0x00, 0x02, 0x40, 0x20, 0x00, 0x02, 0x49, 0xe3, 0x00, 0x0c, 0xd0, 0x20, 0x00, 0x02, 0x4c,
+ 0x20, 0x00, 0x02, 0x50, 0xe3, 0x00, 0x0c, 0xdc, 0x20, 0x00, 0x02, 0x50, 0x20, 0x00, 0x02, 0x59,
+ 0xe3, 0x00, 0x0c, 0xe0, 0x20, 0x00, 0x02, 0x5c, 0x20, 0x00, 0x02, 0x60, 0xe3, 0x00, 0x0c, 0xec,
+ 0x20, 0x00, 0x02, 0x60, 0x20, 0x00, 0x02, 0x69, 0xe3, 0x00, 0x0c, 0xf0, 0x20, 0x00, 0x02, 0x6c,
+ 0x20, 0x00, 0x02, 0x70, 0xe3, 0x00, 0x0c, 0xfc, 0x20, 0x00, 0x02, 0x70, 0x20, 0x00, 0x02, 0x79,
+ 0xe3, 0x00, 0x0d, 0x00, 0x20, 0x00, 0x02, 0x8c, 0x20, 0x00, 0x02, 0x8c, 0xe3, 0x00, 0x0d, 0x0c,
+ 0x20, 0x00, 0x02, 0x90, 0x20, 0x00, 0x02, 0x93, 0xe3, 0x00, 0x0d, 0x0c, 0x20, 0x00, 0x02, 0xac,
+ 0x20, 0x00, 0x02, 0xb0, 0xe3, 0x00, 0x0d, 0x10, 0x20, 0x00, 0x02, 0xd0, 0x20, 0x00, 0x02, 0xf2,
+ 0xe3, 0x00, 0x0d, 0x14, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0d, 0x38,
+ 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0d, 0x38, 0x20, 0x00, 0x03, 0xb0,
+ 0x20, 0x00, 0x03, 0xb0, 0xe3, 0x00, 0x0d, 0x38, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x03, 0xb0,
+ 0xe3, 0x00, 0x0d, 0x38, 0x20, 0x00, 0x03, 0xb0, 0x20, 0x00, 0x6b, 0xa8, 0xe3, 0x00, 0x0d, 0x38,
+ 0x20, 0x00, 0x6b, 0xa8, 0x20, 0x00, 0x6b, 0xa8, 0xe3, 0x00, 0x75, 0x30, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0xfc, 0x00, 0x00, 0x1f, 0xfc, 0x00, 0x00,
- 0x1f, 0xff, 0xc4, 0xc0, 0x1f, 0xff, 0xc5, 0xb0, 0x20, 0x00, 0x5b, 0xc0, 0x20, 0x00, 0x5b, 0xc0,
- 0x00, 0x0f, 0xff, 0xff, 0x1f, 0xff, 0xc2, 0x50, 0x1f, 0xfc, 0xfe, 0x00, 0x1f, 0xff, 0xc0, 0x44,
- 0x40, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x19, 0xde, 0xff, 0xfe, 0x00,
- 0xde, 0xad, 0xbe, 0xef, 0x41, 0x00, 0x00, 0x00, 0x35, 0x00, 0x00, 0x00, 0x1f, 0xff, 0xc2, 0x1d,
- 0x1f, 0xff, 0xc5, 0x00, 0x10, 0x00, 0x00, 0x01, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
- 0x80, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x09, 0x80, 0x00, 0x00, 0x1e,
- 0x00, 0x1f, 0xf8, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x80, 0x18, 0x00, 0x00, 0x00,
- 0x01, 0x00, 0x80, 0x01, 0x42, 0x00, 0x00, 0x00, 0x1f, 0xff, 0xc1, 0xcd, 0x1f, 0xff, 0xc0, 0x8c,
- 0x00, 0x01, 0x00, 0x80, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00,
- 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x00, 0x08, 0x00, 0x80, 0x00, 0x00, 0x1c,
- 0x00, 0x01, 0x00, 0x00, 0x80, 0x00, 0x00, 0x1a, 0x80, 0x00, 0x00, 0x18, 0xfc, 0x00, 0x00, 0x00,
- 0x80, 0x00, 0x00, 0x01, 0x00, 0x00, 0x40, 0x00, 0x80, 0x00, 0x04, 0x00, 0x03, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x08, 0x00, 0x50, 0x00, 0x00, 0x03, 0xff, 0xff, 0xbf, 0xff, 0x00, 0x00, 0x16, 0xd0,
- 0x00, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0xff, 0xf7, 0xa5, 0x00, 0x00, 0x00,
- 0x1f, 0xff, 0xc3, 0xe0, 0x1f, 0xff, 0xc3, 0x91, 0x00, 0x01, 0x00, 0x08, 0x00, 0x00, 0x0b, 0x20,
- 0x20, 0x2f, 0xff, 0x80, 0x1f, 0xff, 0xc3, 0x85, 0x00, 0x00, 0x08, 0x0c, 0x00, 0xff, 0xff, 0xff,
- 0xff, 0xfe, 0xff, 0xf8, 0x00, 0x00, 0x2c, 0x00, 0x50, 0x00, 0x00, 0x02, 0x1f, 0xff, 0xc4, 0xa8,
+ 0x1f, 0xff, 0xc5, 0x90, 0x1f, 0xff, 0xc6, 0x70, 0x20, 0x00, 0x6b, 0xa8, 0x20, 0x00, 0x6b, 0xa8,
+ 0xde, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x08, 0x0c, 0xde, 0xad, 0xbe, 0xef, 0x1f, 0xff, 0xc2, 0xa0,
+ 0x1f, 0xfc, 0xfe, 0x00, 0x1f, 0xff, 0xc0, 0x94, 0x1f, 0xff, 0xc5, 0xc0, 0x30, 0x00, 0x00, 0x00,
+ 0x00, 0x3f, 0xff, 0xff, 0x80, 0x40, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x08, 0x0f, 0xff, 0xff,
+ 0x1f, 0xff, 0xc2, 0x6d, 0x00, 0x0f, 0xff, 0xff, 0x80, 0x4f, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x08, 0x80, 0xb0, 0x00, 0x00, 0x05, 0x60, 0x50, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00,
+ 0x40, 0x00, 0x00, 0x11, 0x35, 0x00, 0x00, 0x00, 0x41, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x01,
+ 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x7f, 0xff, 0xff, 0xff, 0x40, 0x00, 0x00, 0x00,
+ 0x05, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x19, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00,
+ 0x10, 0x00, 0x00, 0x05, 0x80, 0x60, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x20, 0x00, 0x00, 0x09,
+ 0x00, 0x1f, 0xf8, 0x00, 0x80, 0x00, 0x00, 0x1e, 0xa0, 0x00, 0x00, 0x00, 0xf8, 0x00, 0x00, 0x00,
+ 0x07, 0xff, 0xff, 0xff, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x01, 0x00, 0x80, 0x01,
+ 0x42, 0x00, 0x00, 0x00, 0x1f, 0xff, 0xc2, 0x1d, 0x1f, 0xff, 0xc0, 0xdc, 0x00, 0x01, 0x00, 0x80,
+ 0x60, 0x40, 0x00, 0x00, 0x1a, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x00,
+ 0x60, 0x00, 0x08, 0x00, 0x80, 0x00, 0x00, 0x1c, 0x00, 0x01, 0x00, 0x00, 0x80, 0x00, 0x00, 0x1a,
+ 0x80, 0x00, 0x00, 0x18, 0xfc, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00, 0x40, 0x00,
+ 0x03, 0x00, 0x00, 0x00, 0x80, 0x00, 0x04, 0x00, 0x50, 0x00, 0x00, 0x03, 0xff, 0xff, 0xbf, 0xff,
+ 0x1f, 0xff, 0xc3, 0xd4, 0x00, 0x00, 0x0f, 0xff, 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00, 0x16, 0xd0,
+ 0x00, 0x00, 0xff, 0xf7, 0xa5, 0x00, 0x00, 0x00, 0x1f, 0xff, 0xc4, 0xb0, 0x1f, 0xff, 0xc4, 0x61,
+ 0x00, 0x01, 0x00, 0x08, 0x00, 0x00, 0x0b, 0x20, 0x20, 0x2f, 0xff, 0x80, 0x1f, 0xff, 0xc4, 0x55,
+ 0x00, 0x00, 0x2c, 0x00, 0xff, 0xfe, 0xff, 0xf8, 0x00, 0xff, 0xff, 0xff, 0x1f, 0xff, 0xc5, 0x78,
0x00, 0x00, 0x20, 0x00, 0xff, 0xff, 0xdf, 0xff, 0x00, 0x00, 0xff, 0xef, 0x01, 0x00, 0x11, 0x00,
- 0x1f, 0xff, 0xc3, 0xa1, 0x1f, 0xff, 0xc3, 0xd0, 0x1f, 0xff, 0xc4, 0xd0, 0xff, 0xff, 0xef, 0xff,
- 0x00, 0x00, 0xff, 0xfb, 0x1f, 0xff, 0xbe, 0x50, 0xff, 0xff, 0xf7, 0xff, 0x1f, 0xff, 0xc0, 0x14,
- 0x00, 0x00, 0xff, 0xfd, 0x00, 0x01, 0xfb, 0xd0, 0x1f, 0xff, 0xc4, 0xf0, 0x1f, 0xff, 0xc5, 0xa0,
- 0x1f, 0xff, 0xc4, 0xd1, 0xe0, 0xff, 0xfe, 0x00, 0x00, 0x00, 0x80, 0x00, 0x1f, 0xff, 0xc4, 0x6c,
- 0x1f, 0xff, 0xc4, 0xf4, 0x1f, 0xff, 0xc0, 0x18, 0x1f, 0xff, 0xc4, 0x0c, 0x1f, 0xfc, 0xff, 0xd8,
- 0x00, 0x01, 0x00, 0x81, 0x7f, 0xff, 0xff, 0xff, 0xe1, 0x00, 0x06, 0x00, 0x00, 0x00, 0x27, 0x10,
- 0x20, 0x30, 0x00, 0x00, 0xdf, 0xff, 0xfe, 0x00, 0x1f, 0xfc, 0xfe, 0x30, 0x1f, 0xfc, 0xfe, 0x70,
- 0xe1, 0x00, 0x02, 0x00, 0x1f, 0xff, 0xc4, 0x68, 0x1f, 0xff, 0xc4, 0x80, 0x00, 0x03, 0xd0, 0x90,
- 0x1f, 0xff, 0xc4, 0x94, 0x2b, 0x50, 0x63, 0x80, 0x2b, 0x50, 0x79, 0x80, 0x2b, 0x50, 0x90, 0x80,
- 0x2b, 0x50, 0xa6, 0x80, 0x1f, 0xff, 0xc3, 0x99, 0x01, 0x00, 0x11, 0x0f, 0x20, 0x2f, 0xfe, 0x00,
- 0x20, 0x30, 0x00, 0x80, 0x20, 0x2f, 0xff, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x01, 0xff, 0xf8,
- 0x2b, 0x50, 0xb2, 0x00, 0x2b, 0x50, 0xb2, 0x08, 0x00, 0x01, 0x00, 0x10, 0x2b, 0x50, 0xb1, 0x80,
- 0x2b, 0x50, 0xb2, 0x80, 0x2b, 0x50, 0xba, 0x00, 0x00, 0x01, 0x00, 0x11, 0x2b, 0x50, 0xbd, 0x28,
- 0x2b, 0x50, 0xbc, 0x80, 0x2b, 0x50, 0xbd, 0xa0, 0x00, 0xc0, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00,
- 0xff, 0xff, 0xf7, 0xf4, 0x1f, 0xff, 0xc0, 0x1c, 0x60, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xf8, 0x00,
- 0x04, 0x40, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x0c, 0x40, 0x00, 0x00, 0x1c, 0x40, 0x00, 0x00,
- 0xe0, 0x00, 0x00, 0xa0, 0x1f, 0xff, 0xc4, 0x70, 0x1f, 0xfd, 0x00, 0x08, 0x1f, 0xff, 0xc4, 0x84,
- 0x1f, 0xff, 0xc4, 0x98, 0x1f, 0xff, 0xc4, 0xac, 0xe1, 0x00, 0x06, 0x90, 0xe1, 0x00, 0x06, 0xec,
- 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x20, 0x10, 0x00, 0x40, 0x20, 0x10, 0x00, 0x40, 0x20, 0x10, 0x00, 0x40, 0x20, 0x14, 0x00, 0x80,
- 0x20, 0x0c, 0x00, 0x00, 0x20, 0x0c, 0x00, 0x00, 0x20, 0x0c, 0x00, 0x00, 0x20, 0x10, 0x00, 0x40,
- 0x20, 0x14, 0x00, 0x80, 0x20, 0x14, 0x00, 0x80, 0x20, 0x14, 0x00, 0x80, 0x20, 0x18, 0x00, 0xc0,
- 0x20, 0x1c, 0x01, 0x00, 0x20, 0x1c, 0x01, 0x00, 0x20, 0x1c, 0x01, 0x00, 0x20, 0x20, 0x01, 0x40,
- 0x20, 0x18, 0x00, 0xc0, 0x20, 0x18, 0x00, 0xc0, 0x20, 0x18, 0x00, 0xc0, 0x20, 0x1c, 0x01, 0x00,
- 0x20, 0x18, 0x00, 0xc0, 0x20, 0x18, 0x00, 0xc0, 0x20, 0x18, 0x00, 0xc0, 0x20, 0x1c, 0x01, 0x00,
- 0x20, 0x20, 0x01, 0x40, 0x20, 0x20, 0x01, 0x40, 0x20, 0x20, 0x01, 0x40, 0x20, 0x20, 0x09, 0x40,
- 0x20, 0x20, 0x09, 0x40, 0x20, 0x20, 0x09, 0x40, 0x20, 0x20, 0x09, 0x40, 0x20, 0x24, 0x09, 0x80,
- 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00,
+ 0x1f, 0xff, 0xc3, 0xd2, 0x1f, 0xff, 0xc5, 0x90, 0xff, 0xff, 0xef, 0xff, 0x00, 0x00, 0xff, 0xfb,
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+ 0x20, 0x06, 0xd6, 0x20, 0x6e, 0x85, 0x02, 0x60, 0x00, 0xde, 0x17, 0xe0, 0xd5, 0x1d, 0xe0, 0xdc,
+ 0x19, 0xe0, 0xd5, 0xc0, 0xc1, 0xc0, 0x20, 0x2a, 0x8c, 0xfc, 0x64, 0xa1, 0x32, 0x2b, 0x61, 0x02,
+ 0xb4, 0x4e, 0x0b, 0x0b, 0x4c, 0x65, 0xb0, 0xa8, 0x2b, 0x60, 0x0c, 0x2a, 0x62, 0x00, 0x0c, 0xb8,
+ 0x11, 0x07, 0x88, 0x08, 0x2f, 0x82, 0x86, 0x09, 0xb9, 0x0a, 0x7f, 0xe3, 0x02, 0x60, 0x00, 0x9f,
+ 0x29, 0x92, 0xa3, 0x68, 0x90, 0x05, 0x09, 0xaa, 0x0c, 0x65, 0xa0, 0x93, 0x28, 0x82, 0x85, 0x64,
+ 0x80, 0x8d, 0xb8, 0x89, 0x1b, 0xe0, 0xda, 0x94, 0x81, 0x9b, 0x80, 0x65, 0x51, 0x4d, 0xc0, 0xb7,
+ 0xb8, 0x38, 0xc0, 0xa1, 0xc0, 0xe0, 0x09, 0xae, 0x38, 0x0e, 0x0e, 0x42, 0x64, 0xe0, 0x48, 0x1a,
+ 0xe0, 0xb8, 0x1f, 0xe0, 0xb9, 0x2f, 0xa6, 0x7e, 0xb0, 0x4a, 0x6d, 0xaa, 0x05, 0x00, 0x80, 0x88,
+ 0x00, 0x90, 0x8c, 0xc0, 0xa0, 0x2e, 0x60, 0x0c, 0x0c, 0xe8, 0x11, 0xa7, 0x88, 0x2f, 0x82, 0x85,
+ 0xad, 0xee, 0x0f, 0x4f, 0x0b, 0x2f, 0x86, 0x85, 0x2b, 0x60, 0x06, 0x22, 0xe4, 0xcf, 0x68, 0xb1,
+ 0x2a, 0x29, 0x60, 0x15, 0xc0, 0xb2, 0xc9, 0x9a, 0xd2, 0xa0, 0x2d, 0x61, 0x02, 0x2b, 0x64, 0x06,
+ 0x0c, 0xdd, 0x02, 0x2d, 0x65, 0x02, 0xd1, 0x0f, 0xc0, 0xe0, 0x08, 0xae, 0x38, 0x7e, 0xb0, 0xb7,
+ 0x63, 0xff, 0xab, 0x00, 0x22, 0x64, 0x06, 0xd2, 0xa0, 0xd1, 0x0f, 0x00, 0xd2, 0xa0, 0xd1, 0x0f,
+ 0x00, 0xcc, 0x57, 0xda, 0x60, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x08, 0x9d, 0xc0, 0x20, 0xd1, 0x0f,
+ 0xda, 0x60, 0x58, 0x09, 0x2d, 0x63, 0xff, 0xe8, 0x00, 0x28, 0x22, 0x1e, 0x29, 0x22, 0x1d, 0x78,
+ 0x99, 0x02, 0x28, 0x0a, 0x00, 0xc1, 0x76, 0xc1, 0xc1, 0xc1, 0xd2, 0x1b, 0xe0, 0xa5, 0xc1, 0x24,
+ 0xab, 0x6b, 0x64, 0x80, 0x43, 0x78, 0x91, 0x40, 0x2a, 0x80, 0x00, 0x0c, 0xaf, 0x0c, 0x64, 0xf0,
+ 0xae, 0x0d, 0xae, 0x0c, 0x64, 0xe0, 0xa8, 0x02, 0xaf, 0x0c, 0x64, 0xf0, 0xa2, 0x07, 0xae, 0x0c,
+ 0x64, 0xe0, 0x9c, 0x2f, 0xac, 0xe8, 0x64, 0xf0, 0x96, 0x2e, 0xac, 0xe7, 0x64, 0xe0, 0x90, 0x2f,
+ 0xac, 0xe6, 0x64, 0xf0, 0x8a, 0x2a, 0x80, 0x07, 0x08, 0xa8, 0x0b, 0x08, 0x8a, 0x02, 0x7b, 0x83,
+ 0x02, 0x2a, 0x8d, 0xf8, 0xd8, 0xa0, 0x65, 0xaf, 0xbb, 0xc0, 0x90, 0x60, 0x00, 0x73, 0x00, 0x00,
+ 0x2b, 0x60, 0x0c, 0x0c, 0xb8, 0x11, 0xa7, 0x88, 0x2e, 0x82, 0x86, 0x6e, 0xe8, 0x79, 0x09, 0xba,
+ 0x0a, 0x2a, 0xa2, 0xa3, 0x68, 0xa0, 0x04, 0x8e, 0x60, 0x7a, 0xe9, 0x6b, 0x2a, 0x82, 0x85, 0x64,
+ 0xa0, 0x65, 0x1f, 0xe0, 0x8d, 0xc0, 0xe3, 0x2e, 0x64, 0x06, 0x9e, 0xa1, 0x9f, 0xa0, 0x1f, 0xe0,
+ 0xb9, 0x2e, 0x60, 0x0a, 0x92, 0xa3, 0x0f, 0xee, 0x02, 0x9e, 0xa2, 0x8e, 0x60, 0x0f, 0xee, 0x02,
+ 0x9e, 0xa4, 0x2f, 0x60, 0x14, 0x7a, 0xff, 0x47, 0x22, 0xa4, 0x17, 0xad, 0xbe, 0x2f, 0x82, 0x85,
+ 0x22, 0xe4, 0xcf, 0x2f, 0xfc, 0x18, 0x2f, 0x86, 0x85, 0x63, 0xfe, 0x70, 0x2a, 0x6c, 0x74, 0xc0,
+ 0xb1, 0xdc, 0x90, 0xdd, 0x40, 0x58, 0x07, 0xa3, 0x1d, 0xe0, 0x72, 0xc0, 0xc1, 0x63, 0xfe, 0xc4,
+ 0xd9, 0xa0, 0xda, 0x60, 0xdb, 0x30, 0xdc, 0x40, 0xdd, 0x50, 0xc2, 0xf0, 0xc1, 0xe0, 0x09, 0xfe,
+ 0x39, 0x58, 0x07, 0xea, 0xd2, 0xa0, 0xd1, 0x0f, 0xda, 0x60, 0x58, 0x08, 0xef, 0x63, 0xfe, 0xf0,
+ 0x2c, 0xa4, 0x17, 0x0d, 0xbe, 0x08, 0x29, 0x82, 0x85, 0x22, 0xe4, 0xcf, 0x29, 0x9c, 0x18, 0x29,
+ 0x86, 0x85, 0x64, 0x50, 0x0c, 0x2a, 0x6c, 0x74, 0x04, 0x4b, 0x02, 0x58, 0x01, 0x6b, 0xd2, 0xa0,
+ 0xd1, 0x0f, 0xc0, 0x20, 0xd1, 0x0f, 0x00, 0x00, 0x6c, 0x10, 0x06, 0x2b, 0x22, 0x1e, 0x28, 0x22,
0x1d, 0x93, 0x10, 0x7b, 0x89, 0x01, 0xc0, 0xb0, 0xc0, 0xc9, 0xc0, 0x3b, 0xc1, 0xf2, 0x04, 0x06,
- 0x40, 0x1d, 0xe4, 0x5c, 0xc0, 0xe2, 0xc0, 0x74, 0x07, 0x47, 0x01, 0x0e, 0x4e, 0x01, 0xad, 0x2d,
+ 0x40, 0x1d, 0xe0, 0x5b, 0xc0, 0xe2, 0xc0, 0x74, 0x07, 0x47, 0x01, 0x0e, 0x4e, 0x01, 0xad, 0x2d,
0x9e, 0x11, 0xc0, 0x40, 0x2e, 0x0a, 0x14, 0x64, 0xb0, 0x6e, 0x6d, 0x08, 0x44, 0x28, 0x22, 0x1d,
0x7b, 0x81, 0x65, 0x2a, 0xb0, 0x00, 0x7e, 0xa1, 0x3b, 0x7f, 0xa1, 0x47, 0x7b, 0x51, 0x20, 0x7c,
0xa1, 0x49, 0x68, 0xa9, 0x17, 0x68, 0xaa, 0x14, 0x73, 0xa1, 0x11, 0xc0, 0x9f, 0x79, 0xa1, 0x0c,
@@ -939,482 +1207,482 @@ static u8 t3fw_data[] = {
0x63, 0xff, 0xdc, 0x00, 0x64, 0x7f, 0xb4, 0x63, 0xff, 0xd5, 0x00, 0x00, 0x64, 0x6f, 0xd0, 0xc0,
0x41, 0xc1, 0xae, 0x2a, 0xb4, 0x00, 0x63, 0xff, 0xc6, 0x2b, 0x21, 0x02, 0xce, 0xbe, 0x2a, 0x22,
0x1d, 0x2b, 0x22, 0x1e, 0x7a, 0xb1, 0x2a, 0x8c, 0x10, 0x7c, 0xb1, 0x21, 0x7a, 0xb9, 0x01, 0xc0,
- 0xb0, 0xc9, 0xb9, 0x13, 0xe4, 0x1f, 0xda, 0x20, 0x28, 0xb0, 0x00, 0x2c, 0xb0, 0x07, 0x03, 0x88,
+ 0xb0, 0xc9, 0xb9, 0x13, 0xe0, 0x26, 0xda, 0x20, 0x28, 0xb0, 0x00, 0x2c, 0xb0, 0x07, 0x03, 0x88,
0x0a, 0x28, 0x82, 0x4c, 0xc0, 0xd1, 0x0b, 0x80, 0x00, 0xdb, 0xa0, 0x65, 0xaf, 0xe7, 0xd2, 0x40,
0xd1, 0x0f, 0x89, 0x10, 0x65, 0x9f, 0xd4, 0x63, 0xff, 0xf3, 0x00, 0x00, 0x6c, 0x10, 0x08, 0xc0,
- 0x70, 0x64, 0x51, 0x7d, 0x8f, 0x30, 0x29, 0x21, 0x02, 0x0f, 0x0f, 0x47, 0x16, 0xe4, 0x12, 0x09,
- 0x0c, 0x4c, 0x65, 0xc0, 0x97, 0x2d, 0x32, 0x00, 0x0d, 0x6e, 0x51, 0x68, 0xe3, 0x02, 0x60, 0x00,
- 0x8b, 0x28, 0x62, 0x9e, 0x1a, 0xe4, 0x0b, 0x6e, 0x88, 0x56, 0x2a, 0xa2, 0x26, 0x68, 0xa0, 0x05,
- 0x2b, 0x22, 0x00, 0x7a, 0xb9, 0x4a, 0x2a, 0x62, 0x9d, 0x2e, 0x4c, 0xff, 0x64, 0xa0, 0x41, 0x9a,
- 0x10, 0x2b, 0x20, 0x0c, 0x9e, 0x11, 0x0c, 0xbc, 0x11, 0xa6, 0xcc, 0x29, 0xc2, 0x86, 0xb7, 0x48,
- 0x79, 0x8b, 0x45, 0x17, 0xe4, 0x01, 0x07, 0xb7, 0x0a, 0x27, 0x72, 0xa3, 0x68, 0x70, 0x04, 0x88,
- 0x20, 0x77, 0x89, 0x34, 0x2c, 0xc2, 0x85, 0x9c, 0x12, 0xd7, 0xc0, 0x65, 0xc0, 0x69, 0x2c, 0x21,
- 0x04, 0x1a, 0xe4, 0x28, 0x7c, 0xab, 0x26, 0xda, 0x20, 0x58, 0x06, 0xa0, 0x60, 0x00, 0x2d, 0x00,
- 0x00, 0x2e, 0x21, 0x04, 0x1d, 0xe4, 0x24, 0x7e, 0xdb, 0x1b, 0x02, 0x2a, 0x02, 0x2b, 0x0a, 0x06,
- 0x58, 0x06, 0x9a, 0x64, 0x50, 0x19, 0x60, 0x01, 0x5e, 0xc0, 0xc0, 0x63, 0xff, 0xc8, 0xda, 0x20,
- 0x58, 0x08, 0x67, 0x60, 0x00, 0x06, 0xda, 0x20, 0xc0, 0xb6, 0x58, 0x08, 0x65, 0x65, 0x51, 0x47,
- 0x04, 0x4c, 0x02, 0x03, 0x3b, 0x02, 0x2d, 0x32, 0x00, 0xda, 0x20, 0x0d, 0x6d, 0x51, 0x58, 0x06,
- 0xf3, 0xd3, 0xa0, 0x64, 0xa1, 0x31, 0xc0, 0x51, 0x29, 0x21, 0x02, 0x84, 0xa1, 0x8f, 0xa0, 0x04,
- 0x04, 0x47, 0x0f, 0x0f, 0x47, 0x63, 0xff, 0x36, 0x2b, 0x21, 0x04, 0xc0, 0x8c, 0x89, 0x31, 0xc0,
- 0xa0, 0x09, 0xf9, 0x50, 0x09, 0x8a, 0x38, 0x6e, 0xb8, 0x1d, 0x2c, 0x20, 0x66, 0xaf, 0xcc, 0x0c,
- 0x0c, 0x47, 0x2c, 0x24, 0x66, 0x7c, 0xab, 0x0f, 0x9e, 0x14, 0x8a, 0x10, 0x58, 0x07, 0x05, 0x8e,
- 0x14, 0xc0, 0xd0, 0x2d, 0x24, 0x66, 0x8d, 0x30, 0xc0, 0x92, 0x1b, 0xe3, 0xd4, 0xc1, 0xf8, 0x7f,
- 0xd6, 0x0d, 0x87, 0x12, 0x2b, 0x76, 0x00, 0x29, 0x76, 0x01, 0x2f, 0x74, 0x08, 0x27, 0x7c, 0x10,
- 0x65, 0x50, 0xb8, 0xb8, 0x3a, 0xc0, 0xd7, 0xdc, 0x70, 0x25, 0x0a, 0x01, 0xc0, 0x80, 0x07, 0x58,
- 0x38, 0x08, 0x08, 0x42, 0x64, 0x80, 0x79, 0x1d, 0xe3, 0xcc, 0x19, 0xe3, 0xcc, 0x29, 0xd6, 0x7e,
- 0x6a, 0x42, 0x0a, 0xd3, 0x0f, 0x6d, 0xe9, 0x05, 0x00, 0xa0, 0x88, 0x00, 0xc0, 0x8c, 0xc0, 0xa0,
- 0x88, 0x30, 0xc0, 0x92, 0x7f, 0x86, 0x38, 0x07, 0xe8, 0x0b, 0x2f, 0x84, 0x08, 0x9b, 0x80, 0x99,
- 0x81, 0xb4, 0xe8, 0x2c, 0x20, 0x0c, 0xc0, 0x90, 0x1d, 0xe3, 0xc4, 0x0c, 0xc3, 0x11, 0xa6, 0x33,
- 0x22, 0x32, 0x85, 0xad, 0xcc, 0x02, 0x82, 0x0b, 0x29, 0xc4, 0xcf, 0x22, 0x36, 0x85, 0xd2, 0xa0,
- 0xd1, 0x0f, 0x8a, 0x30, 0xc0, 0xf1, 0x7e, 0xae, 0x32, 0x29, 0x21, 0x02, 0x63, 0xfe, 0x7c, 0x00,
- 0x2c, 0x20, 0x0c, 0x8e, 0x11, 0xc0, 0xb0, 0x1d, 0xe3, 0xb8, 0x0c, 0xcf, 0x11, 0xa6, 0xff, 0x22,
- 0xf2, 0x85, 0xad, 0xcc, 0x2b, 0xc4, 0xcf, 0x02, 0xee, 0x0b, 0x2e, 0xf6, 0x85, 0xd2, 0xa0, 0xd1,
- 0x0f, 0xc0, 0x80, 0x0a, 0x58, 0x38, 0x78, 0xd0, 0x86, 0x63, 0xff, 0x7a, 0x9f, 0x13, 0xdb, 0x30,
- 0xda, 0x20, 0xc0, 0xc1, 0xdd, 0x70, 0x5b, 0xff, 0x54, 0x29, 0x21, 0x02, 0x8f, 0x13, 0x2a, 0x9c,
- 0xfe, 0x65, 0xae, 0x37, 0x27, 0x25, 0x02, 0xc0, 0x90, 0x63, 0xfe, 0x2f, 0x2e, 0x16, 0x04, 0x2a,
- 0x2c, 0x74, 0x2b, 0x0a, 0x01, 0x07, 0x7c, 0x02, 0xdd, 0x40, 0x58, 0x06, 0xda, 0x8e, 0x14, 0x1b,
- 0xe3, 0x9b, 0xc1, 0xf8, 0x63, 0xff, 0x58, 0x00, 0xc0, 0x20, 0xd1, 0x0f, 0x6c, 0x10, 0x06, 0x28,
- 0x21, 0x02, 0x16, 0xe3, 0x94, 0x08, 0x08, 0x4c, 0x65, 0x82, 0x16, 0x29, 0x62, 0x9e, 0x6f, 0x98,
- 0x02, 0x60, 0x02, 0x21, 0x19, 0xe3, 0x8f, 0x29, 0x92, 0x26, 0x68, 0x90, 0x07, 0x8a, 0x20, 0x09,
- 0xaa, 0x0c, 0x65, 0xa2, 0x10, 0x27, 0x62, 0x9d, 0xc0, 0xcc, 0x64, 0x72, 0x08, 0x2b, 0x21, 0x04,
- 0x8e, 0x31, 0xc0, 0xa0, 0xdd, 0xa0, 0x0e, 0xfe, 0x50, 0x0e, 0xcd, 0x38, 0x6e, 0xb8, 0x11, 0x2c,
- 0x20, 0x66, 0x2c, 0xcc, 0x01, 0x0c, 0x0c, 0x47, 0x2c, 0x24, 0x66, 0x7c, 0xdb, 0x02, 0x60, 0x01,
- 0xee, 0xc0, 0xc1, 0x29, 0x30, 0x08, 0x1b, 0xe3, 0x89, 0x64, 0x90, 0x97, 0x2f, 0x0a, 0xff, 0xc0,
- 0xd3, 0xb0, 0x9e, 0x64, 0xe0, 0xfd, 0x68, 0x92, 0x0e, 0x64, 0x50, 0x81, 0x2a, 0x2c, 0x74, 0xdb,
- 0x40, 0x58, 0x00, 0x90, 0xd2, 0xa0, 0xd1, 0x0f, 0x2b, 0x20, 0x0c, 0x2f, 0x20, 0x0a, 0x0c, 0xbc,
- 0x11, 0xa6, 0xcc, 0x29, 0xc2, 0x86, 0x28, 0x0a, 0x08, 0x79, 0x83, 0x02, 0x60, 0x01, 0xc0, 0x19,
- 0xe3, 0x72, 0x09, 0xb9, 0x0a, 0x29, 0x92, 0xa3, 0x68, 0x90, 0x08, 0x2e, 0x22, 0x00, 0x09, 0xee,
- 0x0c, 0x65, 0xe1, 0xab, 0x2e, 0xc2, 0x85, 0x16, 0xe3, 0x72, 0x64, 0xe1, 0xa2, 0x27, 0x21, 0x04,
- 0x23, 0x20, 0x07, 0x6e, 0x7b, 0x02, 0x60, 0x01, 0x9e, 0x96, 0xe0, 0x18, 0xe3, 0x74, 0x17, 0xe3,
- 0x72, 0x19, 0xe3, 0x96, 0xc0, 0xd2, 0x9d, 0xe1, 0xa9, 0x39, 0x07, 0xf7, 0x02, 0x97, 0xe2, 0x27,
- 0x90, 0x80, 0x2a, 0x94, 0x80, 0x08, 0x77, 0x02, 0x97, 0xe3, 0x1e, 0xe3, 0x67, 0x2f, 0xc2, 0x85,
- 0xae, 0xbe, 0x0f, 0xdf, 0x0b, 0x2f, 0xc6, 0x85, 0x2a, 0xe4, 0xcf, 0x65, 0x5f, 0x7d, 0xc0, 0x20,
- 0xd1, 0x0f, 0x00, 0x00, 0x2f, 0x30, 0x10, 0x29, 0x30, 0x11, 0x2e, 0x30, 0x13, 0x00, 0x99, 0x32,
- 0x00, 0xed, 0x32, 0x64, 0xf0, 0xee, 0x2a, 0x30, 0x14, 0x1f, 0xe3, 0x85, 0x00, 0xaa, 0x32, 0x78,
- 0xef, 0x05, 0x0f, 0x9e, 0x09, 0x2d, 0xe4, 0x7f, 0x1e, 0xe3, 0x83, 0x66, 0xa0, 0x05, 0x0f, 0x98,
- 0x09, 0x2a, 0x84, 0x80, 0xb4, 0xa7, 0x18, 0xe3, 0x80, 0xc7, 0x6f, 0x00, 0x91, 0x04, 0xae, 0x9e,
- 0xdd, 0xe0, 0x00, 0xaf, 0x1a, 0x00, 0xc3, 0x1a, 0x6e, 0xe1, 0x05, 0x2d, 0xb2, 0x00, 0x0d, 0xed,
- 0x0c, 0x1e, 0xe3, 0x7a, 0x08, 0xd8, 0x1c, 0x06, 0x33, 0x03, 0xae, 0x88, 0x2a, 0x84, 0x8b, 0x2e,
- 0xb0, 0x26, 0x27, 0x84, 0x8c, 0x03, 0xee, 0x01, 0x0f, 0xee, 0x02, 0x2e, 0xb4, 0x26, 0x58, 0x01,
- 0x9f, 0x63, 0xff, 0x04, 0x29, 0x31, 0x08, 0x29, 0x25, 0x04, 0x28, 0x30, 0x14, 0x2e, 0x31, 0x09,
- 0xb0, 0x88, 0x64, 0x80, 0xa3, 0x2e, 0x24, 0x0a, 0xc0, 0x81, 0x2e, 0x30, 0x16, 0x2c, 0xb4, 0x1b,
- 0x2e, 0x24, 0x0b, 0xb4, 0xef, 0x2f, 0x24, 0x0c, 0x8c, 0x37, 0x8b, 0x36, 0x29, 0x25, 0x04, 0xde,
- 0xb0, 0xdf, 0xc0, 0x0f, 0x8f, 0x39, 0x0e, 0x8e, 0x39, 0x0f, 0xee, 0x02, 0x64, 0xee, 0xc9, 0x08,
- 0x9f, 0x11, 0x01, 0xc4, 0x04, 0x8d, 0x38, 0x0c, 0xb8, 0x18, 0x00, 0xc4, 0x04, 0x0c, 0xbe, 0x18,
- 0x00, 0xee, 0x11, 0x0e, 0xdd, 0x02, 0xc0, 0xe3, 0x0e, 0xff, 0x02, 0x1e, 0xe3, 0x4f, 0x9f, 0x71,
- 0x9e, 0x70, 0x1e, 0xe3, 0x4c, 0x8f, 0x20, 0x98, 0x73, 0x9d, 0x74, 0x05, 0xff, 0x11, 0x0b, 0xcd,
- 0x53, 0xc1, 0x80, 0x98, 0x75, 0x0f, 0xdd, 0x02, 0x0e, 0xdd, 0x02, 0x9d, 0x72, 0x2a, 0x24, 0x66,
- 0x1e, 0xe3, 0x1c, 0x2f, 0x62, 0x9d, 0x2a, 0xe4, 0xa2, 0x2f, 0xfc, 0x18, 0x2f, 0x66, 0x9d, 0x63,
- 0xfe, 0x76, 0x00, 0x00, 0x00, 0x2f, 0x30, 0x12, 0x1b, 0xe3, 0x4e, 0x00, 0xfa, 0x32, 0x78, 0xff,
- 0x05, 0x0b, 0x98, 0x0b, 0x2a, 0x84, 0x7f, 0x66, 0xd0, 0x05, 0x0b, 0x9a, 0x0b, 0x2d, 0xa4, 0x80,
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- 0x0f, 0xc0, 0x50, 0x03, 0x25, 0x38, 0x75, 0xc0, 0xdf, 0x63, 0xff, 0xd9, 0x09, 0x7d, 0x0c, 0xaf,
- 0xdd, 0x0d, 0xee, 0x0c, 0x64, 0x30, 0x4e, 0xd2, 0x30, 0x0d, 0x3f, 0x12, 0x96, 0x11, 0x2f, 0x16,
- 0x00, 0x2f, 0xfc, 0x10, 0x0f, 0x4f, 0x36, 0x26, 0x0a, 0x01, 0x25, 0x0a, 0x00, 0x09, 0x65, 0x38,
- 0x05, 0x05, 0x42, 0x64, 0x50, 0x71, 0x2a, 0xb6, 0x7e, 0x6d, 0xfa, 0x05, 0x00, 0x20, 0x88, 0x00,
- 0x90, 0x8c, 0xc0, 0x50, 0xa3, 0xd2, 0x89, 0x10, 0x23, 0x7c, 0x0c, 0x09, 0x44, 0x0c, 0x29, 0x0a,
- 0x01, 0x03, 0x95, 0x38, 0x05, 0x05, 0x42, 0x64, 0x50, 0x5a, 0x2a, 0xb6, 0x7e, 0x6d, 0x4a, 0x05,
- 0x00, 0x20, 0x88, 0x00, 0x30, 0x8c, 0xd2, 0x80, 0xa7, 0xea, 0xbc, 0xaa, 0x9a, 0x70, 0xd1, 0x0f,
- 0xd2, 0x80, 0xbc, 0x7b, 0x9b, 0x70, 0xd1, 0x0f, 0x00, 0x02, 0x3f, 0x14, 0xc1, 0xd0, 0xd2, 0x30,
- 0x0f, 0xdd, 0x0c, 0x0d, 0x4d, 0x36, 0x29, 0x8d, 0x08, 0xc0, 0xf1, 0x25, 0x0a, 0x00, 0x09, 0xf5,
- 0x38, 0x05, 0x05, 0x42, 0xca, 0x58, 0x2a, 0xb6, 0x7e, 0x6d, 0xda, 0x05, 0x00, 0x20, 0x88, 0x00,
- 0x90, 0x8c, 0x89, 0x70, 0x63, 0xff, 0x25, 0x00, 0xc0, 0x61, 0xc0, 0x50, 0x03, 0x65, 0x38, 0x75,
- 0xc0, 0x86, 0x63, 0xff, 0x80, 0xc0, 0xd0, 0x02, 0x9d, 0x38, 0x7d, 0xc0, 0x9f, 0x63, 0xff, 0x99,
- 0xc0, 0x50, 0x03, 0xf5, 0x38, 0x75, 0xc0, 0xd0, 0x63, 0xff, 0xca, 0x00, 0x6c, 0x10, 0x04, 0xd6,
- 0x20, 0x68, 0x52, 0x0f, 0x69, 0x53, 0x24, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x00, 0xd5,
- 0xc0, 0x20, 0xd1, 0x0f, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x00, 0xd2, 0x9a, 0x24, 0x24,
+ 0x99, 0x12, 0xce, 0x33, 0x64, 0x20, 0x67, 0xd3, 0x20, 0x2b, 0x20, 0x07, 0x95, 0x13, 0x8c, 0x12,
+ 0x2a, 0x62, 0x82, 0x7c, 0xa8, 0x5f, 0x18, 0xd9, 0x81, 0x08, 0x58, 0x0a, 0x28, 0x82, 0x2c, 0xda,
+ 0x50, 0x0b, 0x80, 0x00, 0xd2, 0xa0, 0x64, 0x3f, 0xda, 0x8a, 0x31, 0x0a, 0x8a, 0x14, 0x04, 0xaa,
+ 0x01, 0xc8, 0x29, 0x8b, 0x21, 0x0b, 0x8b, 0x14, 0x04, 0xbb, 0x01, 0x7b, 0xa9, 0x45, 0xdd, 0xa0,
+ 0x7a, 0x7b, 0x08, 0x1d, 0xd9, 0x79, 0x2d, 0xd2, 0x00, 0x0d, 0xad, 0x0c, 0xdb, 0x30, 0x19, 0xd9,
+ 0x73, 0x1a, 0xd9, 0xb8, 0x28, 0x12, 0x03, 0x0a, 0xda, 0x28, 0x08, 0x8c, 0x02, 0x1d, 0xd9, 0xf5,
+ 0x09, 0x88, 0x0a, 0x28, 0x82, 0x3c, 0x0d, 0xaa, 0x08, 0x0b, 0x80, 0x00, 0x65, 0x2f, 0x97, 0xd3,
+ 0x20, 0xc0, 0xb0, 0x63, 0xff, 0x97, 0xcb, 0x53, 0xb1, 0x55, 0x00, 0x50, 0x04, 0x0a, 0x09, 0x19,
+ 0x63, 0xff, 0x49, 0x00, 0xda, 0xb0, 0x7b, 0x7b, 0x07, 0x1a, 0xd9, 0x67, 0x8a, 0xa0, 0x0a, 0xba,
+ 0x0c, 0x1b, 0xd9, 0xa8, 0x8c, 0x31, 0x0b, 0xab, 0x28, 0x0c, 0x8a, 0x14, 0x1c, 0xd9, 0xe6, 0xac,
+ 0xbb, 0x1c, 0xd9, 0xe5, 0x04, 0xaa, 0x01, 0x2b, 0xc6, 0x81, 0x63, 0xff, 0x90, 0x7f, 0xa7, 0xc7,
+ 0x63, 0xff, 0x62, 0x00, 0x6c, 0x10, 0x04, 0x27, 0x22, 0x1e, 0xc0, 0x80, 0x08, 0xe4, 0x31, 0x1b,
+ 0xd9, 0x58, 0x00, 0x02, 0x00, 0x2a, 0xb2, 0x82, 0x19, 0xd9, 0x58, 0x00, 0x31, 0x04, 0xc0, 0x61,
+ 0x00, 0x66, 0x1a, 0x29, 0x91, 0x02, 0x0a, 0x6a, 0x02, 0x2a, 0xb6, 0x82, 0x09, 0xe4, 0x31, 0x15,
+ 0xd9, 0xb3, 0x0c, 0x38, 0x11, 0xa8, 0x53, 0x28, 0x32, 0x82, 0x24, 0x32, 0x84, 0x2a, 0x8c, 0xfc,
+ 0x78, 0x41, 0x10, 0x29, 0x21, 0x02, 0x2a, 0x36, 0x82, 0x97, 0xa0, 0x09, 0x69, 0x02, 0x29, 0x25,
+ 0x02, 0xd1, 0x0f, 0x00, 0x2b, 0x21, 0x02, 0x2c, 0x32, 0x85, 0x0b, 0x6b, 0x02, 0x2c, 0xcc, 0xfc,
+ 0x2c, 0x36, 0x82, 0x97, 0xc0, 0x2b, 0x25, 0x02, 0xd1, 0x0f, 0x00, 0x00, 0x6c, 0x10, 0x04, 0xc0,
+ 0xe7, 0x1d, 0xd9, 0x3b, 0x1c, 0xd9, 0x3d, 0x0d, 0x49, 0x11, 0xd7, 0x20, 0x8b, 0x22, 0x8a, 0x20,
+ 0x0b, 0x4b, 0x0b, 0xd2, 0xa0, 0x07, 0xa8, 0x0c, 0x9b, 0x72, 0x28, 0x8c, 0xf4, 0xc8, 0x34, 0x6f,
+ 0x8e, 0x02, 0x60, 0x00, 0xa2, 0x1f, 0xd9, 0x33, 0xa2, 0x98, 0xaf, 0x7b, 0x78, 0xb3, 0x34, 0xc9,
+ 0x3d, 0xc0, 0x81, 0xc0, 0xf0, 0x02, 0x8f, 0x38, 0x0f, 0x0f, 0x42, 0xc9, 0xfa, 0x2c, 0xd6, 0x7e,
+ 0xd5, 0x20, 0x6d, 0x4a, 0x05, 0x00, 0x30, 0x88, 0x00, 0x50, 0x8c, 0x88, 0x70, 0x08, 0x98, 0x08,
+ 0x78, 0xb1, 0x6c, 0xd2, 0xa0, 0x98, 0x70, 0xd1, 0x0f, 0xc0, 0xf0, 0x03, 0x8f, 0x38, 0x7f, 0xe0,
+ 0xde, 0x63, 0xff, 0xd8, 0x02, 0x7b, 0x0c, 0xaf, 0xbb, 0x0b, 0x99, 0x0c, 0x64, 0x30, 0x46, 0xd8,
+ 0x30, 0xc0, 0xf1, 0xc0, 0x50, 0x02, 0xf5, 0x38, 0x05, 0x05, 0x42, 0x64, 0x50, 0x79, 0x2c, 0xd6,
+ 0x7e, 0x0b, 0x36, 0x12, 0x2f, 0x6c, 0x10, 0x0f, 0x4f, 0x36, 0x6d, 0xfa, 0x05, 0x00, 0x80, 0x88,
+ 0x00, 0x20, 0x8c, 0x06, 0x44, 0x0c, 0xc0, 0x81, 0x25, 0x0a, 0x00, 0x03, 0xb2, 0x08, 0x23, 0x7c,
+ 0x0c, 0x03, 0x85, 0x38, 0x05, 0x05, 0x42, 0x64, 0x50, 0x59, 0x2c, 0xd6, 0x7e, 0x6d, 0x4a, 0x05,
+ 0x00, 0x20, 0x88, 0x00, 0x30, 0x8c, 0xd2, 0xa0, 0xa7, 0x98, 0xbc, 0x88, 0x98, 0x70, 0xd1, 0x0f,
+ 0xd2, 0xa0, 0xbc, 0x79, 0x99, 0x70, 0xd1, 0x0f, 0xd2, 0x30, 0x2b, 0xad, 0x08, 0xc0, 0xf1, 0xc0,
+ 0x50, 0x0b, 0xf5, 0x38, 0x05, 0x05, 0x42, 0xcb, 0x55, 0x2c, 0xd6, 0x7e, 0x08, 0x3f, 0x14, 0xc1,
+ 0x60, 0x0f, 0x66, 0x0c, 0x06, 0x46, 0x36, 0xd3, 0x0f, 0x6d, 0x6a, 0x05, 0x00, 0x20, 0x88, 0x00,
+ 0xb0, 0x8c, 0x82, 0x70, 0x63, 0xff, 0x2d, 0x00, 0xc0, 0x50, 0x03, 0xf5, 0x38, 0x75, 0xe0, 0x80,
+ 0x63, 0xff, 0x7a, 0x00, 0xc0, 0x60, 0x02, 0x86, 0x38, 0x76, 0xe0, 0xa0, 0x63, 0xff, 0x9a, 0x00,
+ 0xc0, 0x50, 0x03, 0xf5, 0x38, 0x75, 0xe0, 0xc3, 0x63, 0xff, 0xbd, 0x00, 0x6c, 0x10, 0x04, 0xd6,
+ 0x20, 0x68, 0x52, 0x0f, 0x69, 0x53, 0x24, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x00, 0xf0,
+ 0xd2, 0xa0, 0xd1, 0x0f, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x00, 0xed, 0x9a, 0x24, 0x24,
0x24, 0x0e, 0xc0, 0x21, 0x22, 0x64, 0x0f, 0xc0, 0x20, 0xd1, 0x0f, 0x00, 0xb8, 0x3b, 0xb0, 0x4c,
0x2a, 0x2c, 0x74, 0x89, 0x24, 0x2d, 0x20, 0x0e, 0x2e, 0x20, 0x0f, 0xa4, 0xdd, 0xb1, 0xee, 0x2e,
0x24, 0x0f, 0xb0, 0xdd, 0x2d, 0x24, 0x0e, 0x28, 0x90, 0x07, 0x2d, 0x90, 0x03, 0xa4, 0x88, 0xb0,
- 0x88, 0xb1, 0xdd, 0x2d, 0x94, 0x03, 0x28, 0x94, 0x07, 0x5b, 0xff, 0x9e, 0x69, 0x51, 0x1d, 0xc0,
- 0xe0, 0x82, 0x24, 0x2a, 0x60, 0x0f, 0x18, 0xdd, 0x4f, 0x2a, 0x24, 0x03, 0x29, 0x60, 0x0e, 0x8f,
+ 0x88, 0xb1, 0xdd, 0x2d, 0x94, 0x03, 0x28, 0x94, 0x07, 0x5b, 0xff, 0xa0, 0x69, 0x51, 0x1d, 0xc0,
+ 0xe0, 0x82, 0x24, 0x2a, 0x60, 0x0f, 0x18, 0xd9, 0x66, 0x2a, 0x24, 0x03, 0x29, 0x60, 0x0e, 0x8f,
0x20, 0x29, 0x24, 0x07, 0x08, 0xff, 0x02, 0x9f, 0x20, 0x9e, 0x64, 0xd1, 0x0f, 0xc0, 0x20, 0xd1,
- 0x0f, 0x00, 0x00, 0x00, 0x6c, 0x10, 0x04, 0x94, 0x23, 0x19, 0xdd, 0x47, 0xc0, 0xb3, 0x08, 0x3a,
- 0x11, 0x0b, 0xaa, 0x02, 0x99, 0x20, 0x19, 0xdc, 0xcb, 0x9a, 0x21, 0x28, 0x92, 0x9d, 0x16, 0xdc,
- 0xc8, 0xc0, 0x50, 0x25, 0x64, 0xa2, 0x28, 0x8c, 0x18, 0x28, 0x96, 0x9d, 0xd1, 0x0f, 0x00, 0x00,
+ 0x0f, 0x00, 0x00, 0x00, 0x6c, 0x10, 0x04, 0x94, 0x23, 0x19, 0xd9, 0x5e, 0xc0, 0xb3, 0x08, 0x3a,
+ 0x11, 0x0b, 0xaa, 0x02, 0x99, 0x20, 0x19, 0xd8, 0xd2, 0x9a, 0x21, 0x16, 0xd8, 0xd0, 0xc0, 0x50,
+ 0x28, 0x92, 0x9d, 0x25, 0x64, 0xa2, 0x28, 0x8c, 0x18, 0x28, 0x96, 0x9d, 0xd1, 0x0f, 0x00, 0x00,
0x6c, 0x10, 0x04, 0x28, 0x20, 0x66, 0xc0, 0x38, 0x23, 0x24, 0x06, 0xb7, 0x88, 0x28, 0x24, 0x66,
0xd1, 0x0f, 0x00, 0x00, 0x6c, 0x10, 0x06, 0x03, 0x5a, 0x0c, 0x0d, 0x36, 0x11, 0x0d, 0x5c, 0x11,
0xd8, 0x20, 0x8b, 0x22, 0x82, 0x21, 0x0c, 0xbb, 0x0c, 0x06, 0x55, 0x0f, 0x9b, 0x82, 0x02, 0x32,
- 0x0b, 0x92, 0x81, 0x13, 0xdc, 0xf0, 0xd9, 0x20, 0xa3, 0x8f, 0x64, 0x50, 0x53, 0x1c, 0xdc, 0xba,
- 0xc0, 0xd7, 0x1b, 0xdc, 0xba, 0xa2, 0x56, 0xc0, 0xe1, 0x29, 0x0a, 0x00, 0x04, 0xe9, 0x38, 0x09,
+ 0x0b, 0x92, 0x81, 0x13, 0xd8, 0xbc, 0xd9, 0x20, 0xa3, 0x8f, 0x64, 0x50, 0x53, 0x1c, 0xd8, 0xb8,
+ 0xc0, 0xd7, 0x1b, 0xd8, 0xb9, 0xa2, 0x56, 0xc0, 0xe1, 0x29, 0x0a, 0x00, 0x04, 0xe9, 0x38, 0x09,
0x09, 0x42, 0x76, 0xf3, 0x4a, 0x04, 0x43, 0x02, 0xc9, 0x9e, 0x2b, 0xc6, 0x7e, 0x6d, 0xaa, 0x05,
0x00, 0x20, 0x88, 0x00, 0x30, 0x8c, 0x89, 0x81, 0xa9, 0x59, 0x09, 0xfa, 0x0c, 0x64, 0xa0, 0x79,
0x99, 0x81, 0x8a, 0x82, 0xc8, 0xad, 0xd2, 0x90, 0xd1, 0x0f, 0xc0, 0x60, 0x02, 0xe6, 0x38, 0x76,
@@ -1426,235 +1694,234 @@ static u8 t3fw_data[] = {
0xca, 0x98, 0x2b, 0xc6, 0x7e, 0x6d, 0xaa, 0x05, 0x00, 0x20, 0x88, 0x00, 0x30, 0x8c, 0x0f, 0x59,
0x0c, 0xa9, 0x89, 0xbc, 0x99, 0x99, 0x81, 0x63, 0xff, 0x87, 0xbc, 0x89, 0x99, 0x81, 0x63, 0xff,
0x80, 0xc0, 0x60, 0x02, 0xe6, 0x38, 0x76, 0xd0, 0xba, 0x63, 0xff, 0xb4, 0xc0, 0x70, 0x02, 0x47,
- 0x38, 0x77, 0xd0, 0xd0, 0x63, 0xff, 0xca, 0x00, 0x6c, 0x10, 0x04, 0x29, 0x20, 0x06, 0xc0, 0x70,
- 0x6e, 0x97, 0x41, 0x29, 0x21, 0x02, 0xc0, 0x8f, 0x2a, 0x20, 0x14, 0xc0, 0xb6, 0x2b, 0x24, 0x06,
- 0x06, 0xaa, 0x02, 0x2a, 0x24, 0x14, 0x79, 0x80, 0x02, 0x27, 0x25, 0x02, 0x2a, 0x22, 0x1e, 0x2c,
- 0x22, 0x1d, 0x7a, 0xc1, 0x0e, 0xc8, 0xab, 0xda, 0x20, 0xdb, 0x30, 0x2c, 0x0a, 0x00, 0x03, 0x3d,
- 0x02, 0x5b, 0xf8, 0x25, 0x64, 0x50, 0x75, 0x2d, 0x21, 0x02, 0x0d, 0x0d, 0x4c, 0xc9, 0xd3, 0xc0,
- 0x20, 0xd1, 0x0f, 0x00, 0x00, 0x2e, 0x9c, 0xfb, 0x64, 0xe0, 0x82, 0x2f, 0x21, 0x02, 0x0f, 0x0f,
- 0x4c, 0x65, 0xf0, 0x91, 0x1a, 0xdc, 0x6c, 0x1c, 0xdc, 0x6a, 0x29, 0xa2, 0x9e, 0xc0, 0x8a, 0x79,
- 0x8b, 0x5d, 0x2b, 0xc2, 0x26, 0x68, 0xb0, 0x04, 0x8d, 0x20, 0x7b, 0xd9, 0x52, 0x29, 0xa2, 0x9d,
- 0xc0, 0xf3, 0x64, 0x90, 0x4a, 0x97, 0x90, 0x1d, 0xdc, 0x80, 0x2e, 0x21, 0x04, 0x9d, 0x96, 0x08,
- 0xee, 0x11, 0x0f, 0xee, 0x02, 0x9e, 0x97, 0x9e, 0x91, 0x27, 0xc4, 0xa2, 0x18, 0xdc, 0x88, 0x2f,
- 0x21, 0x02, 0x2b, 0xa2, 0x9d, 0xc0, 0xe5, 0x2e, 0x24, 0x06, 0x2b, 0xbc, 0x30, 0x08, 0xff, 0x02,
- 0x2b, 0xa6, 0x9d, 0x2f, 0x25, 0x02, 0xc0, 0x20, 0xd1, 0x0f, 0x00, 0x00, 0x00, 0x2f, 0x30, 0x00,
- 0x68, 0xf9, 0x38, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0x58, 0x00, 0x3a, 0x63, 0xff, 0x77, 0x00,
- 0x02, 0x2a, 0x02, 0x2b, 0x0a, 0x06, 0x58, 0x00, 0xca, 0x22, 0x0a, 0x00, 0xd1, 0x0f, 0x65, 0x50,
- 0x10, 0x28, 0x30, 0x00, 0x68, 0x89, 0x24, 0x02, 0x2a, 0x02, 0x03, 0x3b, 0x02, 0xdc, 0x40, 0x58,
- 0x00, 0x31, 0xc0, 0x20, 0xd1, 0x0f, 0xd2, 0x70, 0xd1, 0x0f, 0x00, 0x00, 0x2a, 0x2c, 0x74, 0x03,
- 0x3b, 0x02, 0x04, 0x4c, 0x02, 0x5b, 0xff, 0x07, 0x63, 0xff, 0x3b, 0x00, 0xdb, 0x30, 0xdc, 0x40,
- 0x2a, 0x2c, 0x74, 0x5b, 0xff, 0x04, 0xc0, 0x20, 0xd1, 0x0f, 0x00, 0x00, 0x6c, 0x10, 0x04, 0xd8,
- 0x20, 0xd7, 0x30, 0x82, 0x22, 0x0d, 0x45, 0x11, 0x05, 0x22, 0x0c, 0x92, 0x82, 0x64, 0x20, 0x74,
- 0x07, 0x42, 0x0b, 0x13, 0xdc, 0x70, 0xd4, 0x20, 0xa3, 0x83, 0x73, 0x23, 0x02, 0x24, 0x2d, 0xf8,
- 0x85, 0x80, 0x74, 0x51, 0x4c, 0xbc, 0x82, 0xc0, 0x90, 0x6d, 0x08, 0x16, 0x00, 0x40, 0x88, 0x00,
- 0x70, 0x8c, 0x77, 0x39, 0x03, 0xd7, 0x20, 0xc0, 0x91, 0x86, 0x80, 0x74, 0x39, 0x01, 0xd4, 0x20,
- 0x74, 0x61, 0x02, 0x63, 0xff, 0xe2, 0xca, 0x98, 0xc0, 0x97, 0xc0, 0x41, 0x1b, 0xdc, 0xa4, 0xc0,
- 0xa0, 0x0b, 0x8b, 0x0c, 0x0b, 0x4a, 0x38, 0x0a, 0x0a, 0x42, 0xc9, 0xaa, 0x1d, 0xdc, 0x2b, 0x1c,
- 0xdc, 0x2b, 0x2c, 0xd6, 0x7e, 0xc1, 0x40, 0xd3, 0x0f, 0x6d, 0x4a, 0x05, 0x00, 0x20, 0x88, 0x00,
- 0x30, 0x8c, 0x97, 0x80, 0xd2, 0x70, 0xd1, 0x0f, 0xbc, 0x8f, 0xc0, 0xe0, 0x0f, 0x4e, 0x38, 0x7e,
- 0x90, 0xe2, 0x63, 0xff, 0xd6, 0xbc, 0x82, 0x92, 0x81, 0x92, 0x80, 0xc0, 0x20, 0x92, 0x82, 0xd1,
- 0x0f, 0x00, 0x00, 0x00, 0x6c, 0x10, 0x06, 0xc0, 0xd7, 0x1c, 0xdc, 0x1b, 0x1b, 0xdc, 0x1c, 0x0d,
- 0x49, 0x11, 0xd7, 0x20, 0x2a, 0x22, 0x1f, 0x28, 0x22, 0x1d, 0x0a, 0x4a, 0x0b, 0xd2, 0x80, 0x07,
- 0x86, 0x0c, 0x2a, 0x76, 0x1f, 0x26, 0x6c, 0x80, 0xc8, 0x34, 0x6f, 0x6e, 0x02, 0x60, 0x00, 0xd0,
- 0x2f, 0x0a, 0x80, 0x1a, 0xdc, 0x20, 0xa2, 0x9e, 0xaa, 0x7a, 0x7e, 0xa3, 0x3f, 0xc9, 0x3f, 0xc0,
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+ 0x8a, 0x65, 0x89, 0x66, 0xaa, 0xca, 0xa9, 0x7c, 0x77, 0xcb, 0x01, 0xb1, 0xaa, 0x07, 0xfb, 0x0c,
+ 0x9c, 0x66, 0x9a, 0x65, 0x88, 0x26, 0x8e, 0x29, 0xad, 0x87, 0x97, 0x26, 0x07, 0xee, 0x0c, 0x0e,
+ 0x0e, 0x48, 0x2e, 0x25, 0x25, 0x9b, 0x67, 0x2b, 0x20, 0x0c, 0x87, 0x13, 0x1e, 0xd6, 0x3d, 0x0c,
+ 0xb9, 0x11, 0xae, 0x99, 0x28, 0x92, 0x85, 0xa7, 0x88, 0x28, 0x96, 0x85, 0x17, 0xd6, 0x41, 0xc0,
+ 0x90, 0xa7, 0xbb, 0x29, 0xb4, 0xcf, 0x87, 0x18, 0x63, 0xfe, 0x3c, 0x00, 0x8c, 0x60, 0xc0, 0xe0,
+ 0xc0, 0x91, 0xc0, 0xf0, 0xc0, 0x34, 0xc0, 0xb8, 0x2a, 0x21, 0x04, 0x28, 0x20, 0x3c, 0x08, 0xaa,
+ 0x11, 0x0b, 0x8b, 0x01, 0x03, 0x83, 0x01, 0x03, 0x9f, 0x38, 0x0b, 0x9b, 0x39, 0xc0, 0x32, 0x08,
+ 0xff, 0x10, 0x03, 0x88, 0x01, 0x08, 0x9e, 0x38, 0x0c, 0x88, 0x14, 0x07, 0xee, 0x10, 0x0f, 0xee,
+ 0x02, 0x03, 0x88, 0x01, 0x08, 0x98, 0x39, 0x05, 0xbf, 0x10, 0x29, 0x21, 0x1f, 0x0a, 0xbb, 0x11,
+ 0x07, 0x88, 0x10, 0x08, 0xff, 0x02, 0x0b, 0xaa, 0x02, 0x18, 0xd6, 0x35, 0x09, 0x29, 0x14, 0x03,
+ 0xaa, 0x02, 0x2b, 0x21, 0x25, 0x83, 0x20, 0x0b, 0x2b, 0x14, 0x04, 0xbb, 0x11, 0x08, 0x33, 0x11,
+ 0x0f, 0xbb, 0x02, 0x0b, 0x99, 0x02, 0x8b, 0x14, 0x8f, 0x2a, 0x0b, 0x33, 0x02, 0x08, 0x33, 0x02,
+ 0x8b, 0x2b, 0x64, 0x70, 0x86, 0x88, 0x68, 0x97, 0x4d, 0x98, 0x4c, 0x87, 0x69, 0x88, 0x6a, 0x93,
+ 0x41, 0x99, 0x46, 0x97, 0x4e, 0x98, 0x4f, 0xc0, 0x70, 0x77, 0xc7, 0x01, 0xc0, 0x71, 0x9a, 0x47,
+ 0x18, 0xd6, 0x9e, 0x0b, 0x7c, 0x10, 0x0c, 0xec, 0x02, 0x08, 0xf8, 0x02, 0x98, 0x44, 0x18, 0xd6,
+ 0x9b, 0x0c, 0xbc, 0x02, 0x08, 0xcc, 0x02, 0x9c, 0x40, 0x2a, 0x20, 0x0c, 0x29, 0x5c, 0xfe, 0xc0,
+ 0x80, 0x1f, 0xd6, 0x07, 0x1c, 0xd6, 0x0f, 0x0c, 0xae, 0x11, 0x2b, 0x21, 0x24, 0xac, 0xaa, 0xaf,
+ 0xee, 0xb0, 0xbb, 0x8f, 0x13, 0x2c, 0xe2, 0x85, 0x28, 0xa4, 0xcf, 0xaf, 0xcc, 0x2c, 0xe6, 0x85,
+ 0x2a, 0x22, 0x15, 0x2b, 0x25, 0x24, 0xb1, 0xaa, 0x2a, 0x26, 0x15, 0x64, 0x90, 0xdb, 0xc9, 0xd2,
+ 0x8f, 0x26, 0x2e, 0x22, 0x09, 0x0d, 0xff, 0x08, 0x2f, 0x26, 0x06, 0x0f, 0xee, 0x0c, 0x0e, 0x0e,
+ 0x48, 0x2e, 0x25, 0x25, 0x65, 0x50, 0xe4, 0xc0, 0x20, 0xd1, 0x0f, 0x00, 0xc0, 0x70, 0x93, 0x41,
+ 0x9f, 0x44, 0x99, 0x46, 0x9a, 0x47, 0x77, 0xc7, 0x0a, 0x1c, 0xd5, 0xf3, 0x2c, 0xc0, 0x22, 0xc0,
+ 0x81, 0x0c, 0x87, 0x38, 0x1c, 0xd6, 0x7f, 0x0b, 0x78, 0x10, 0x08, 0xe8, 0x02, 0x08, 0xb8, 0x02,
+ 0x0c, 0x88, 0x02, 0x98, 0x40, 0x63, 0xff, 0x80, 0x00, 0xcc, 0x57, 0xda, 0x20, 0xdb, 0x60, 0x8c,
+ 0x11, 0x5b, 0xfd, 0xe3, 0x29, 0x21, 0x02, 0x68, 0x98, 0x06, 0x68, 0x94, 0x03, 0xc0, 0x20, 0xd1,
+ 0x0f, 0x2b, 0x22, 0x1e, 0xc0, 0xa0, 0x29, 0x22, 0x1d, 0x2a, 0x25, 0x02, 0x7b, 0x99, 0x01, 0xc0,
+ 0xb0, 0x64, 0xbf, 0xe8, 0x13, 0xd5, 0xde, 0x2c, 0xb0, 0x07, 0x28, 0xb0, 0x00, 0xda, 0x20, 0x03,
+ 0x88, 0x0a, 0x28, 0x82, 0x4c, 0xc0, 0xd1, 0x0b, 0x80, 0x00, 0xdb, 0xa0, 0x65, 0xaf, 0xe7, 0x63,
+ 0xff, 0xca, 0x00, 0x00, 0x68, 0xa7, 0x79, 0xda, 0x20, 0xdb, 0x30, 0xdc, 0x40, 0xdd, 0x50, 0x5b,
+ 0xfe, 0xe8, 0xd2, 0xa0, 0xd1, 0x0f, 0xc1, 0x6d, 0xc1, 0x9d, 0x29, 0x25, 0x2c, 0x60, 0x00, 0x04,
+ 0x29, 0x25, 0x2c, 0xd6, 0x90, 0x26, 0x24, 0x67, 0x2f, 0x24, 0x68, 0xda, 0x20, 0xdb, 0x30, 0x8c,
+ 0x11, 0xdd, 0x50, 0x2e, 0x0a, 0x80, 0x5b, 0xfd, 0x51, 0xd2, 0xa0, 0xd1, 0x0f, 0xc1, 0x68, 0xc1,
+ 0xa8, 0x2a, 0x25, 0x2c, 0x63, 0xff, 0xdd, 0x00, 0x00, 0x00, 0xc8, 0xdf, 0x8c, 0x26, 0x8b, 0x29,
+ 0xad, 0xcc, 0x9c, 0x26, 0x0c, 0xbb, 0x0c, 0x0b, 0x0b, 0x48, 0x2b, 0x25, 0x25, 0x2a, 0x2c, 0x74,
+ 0xdb, 0x60, 0x2c, 0x12, 0x01, 0x5b, 0xfd, 0x94, 0xd2, 0xa0, 0xd1, 0x0f, 0x2a, 0x2c, 0x74, 0x8b,
+ 0x11, 0x5b, 0xf6, 0xcd, 0xd2, 0xa0, 0xd1, 0x0f, 0xda, 0x20, 0x5b, 0xfe, 0x47, 0x63, 0xff, 0x38,
+ 0x00, 0xda, 0x20, 0xc0, 0xb1, 0x5b, 0xfe, 0x8b, 0x65, 0xaf, 0x2d, 0x63, 0xfb, 0xed, 0xda, 0x20,
+ 0x2b, 0x20, 0x0c, 0x5b, 0xfe, 0x5a, 0x63, 0xff, 0x1f, 0x00, 0x00, 0x00, 0x12, 0xd6, 0x42, 0x82,
+ 0x20, 0x02, 0x82, 0x57, 0xc8, 0x21, 0x63, 0xff, 0xfc, 0x12, 0xd6, 0x3e, 0x03, 0xe8, 0x30, 0x04,
+ 0xee, 0x30, 0x05, 0xb1, 0x30, 0x93, 0x20, 0x94, 0x21, 0x95, 0x22, 0x63, 0xff, 0xfc, 0x00, 0x00,
+ 0x10, 0xd6, 0x3a, 0x91, 0x00, 0x92, 0x01, 0x93, 0x02, 0x94, 0x03, 0x11, 0xd6, 0x11, 0x82, 0x10,
+ 0x01, 0xea, 0x30, 0xa2, 0x11, 0x01, 0xf0, 0x31, 0xc0, 0x40, 0x04, 0xe4, 0x16, 0x00, 0x02, 0x00,
+ 0x11, 0xd6, 0x33, 0x82, 0x10, 0x23, 0x4a, 0x00, 0x03, 0x22, 0x02, 0x92, 0x10, 0x11, 0xd5, 0xfd,
+ 0xc0, 0x21, 0x92, 0x10, 0x04, 0xe4, 0x31, 0x84, 0x03, 0x83, 0x02, 0x82, 0x01, 0x81, 0x00, 0x00,
+ 0xd2, 0x30, 0x01, 0x23, 0x00, 0x00, 0x00, 0x00, 0x10, 0xd6, 0x2a, 0x91, 0x00, 0x92, 0x01, 0x93,
+ 0x02, 0x94, 0x03, 0x11, 0xd6, 0x00, 0x82, 0x10, 0x01, 0xea, 0x30, 0xa2, 0x11, 0x01, 0xf1, 0x31,
+ 0xc0, 0x40, 0x04, 0xe4, 0x16, 0x00, 0x02, 0x00, 0x11, 0xd6, 0x21, 0x82, 0x10, 0x13, 0xd5, 0xa7,
+ 0x03, 0x22, 0x02, 0x92, 0x10, 0x04, 0xe4, 0x31, 0x84, 0x03, 0x83, 0x02, 0x82, 0x01, 0x81, 0x00,
+ 0x00, 0xd3, 0x30, 0x01, 0x33, 0x00, 0x00, 0x00, 0x10, 0xd6, 0x1b, 0x91, 0x00, 0x81, 0x01, 0x65,
+ 0x10, 0x49, 0x81, 0x02, 0x65, 0x10, 0x44, 0x81, 0x03, 0xcf, 0x1f, 0x92, 0x01, 0x93, 0x02, 0x94,
+ 0x03, 0x11, 0xd5, 0xee, 0x82, 0x10, 0x01, 0xea, 0x30, 0xa2, 0x11, 0x01, 0xf2, 0x31, 0xc0, 0x40,
+ 0x04, 0xe4, 0x16, 0x00, 0x02, 0x00, 0x11, 0xd6, 0x0d, 0x82, 0x10, 0x13, 0xd5, 0x8e, 0x03, 0x22,
+ 0x02, 0x92, 0x10, 0x04, 0xe4, 0x31, 0x84, 0x03, 0x83, 0x02, 0x82, 0x01, 0xc0, 0x10, 0x91, 0x03,
+ 0x91, 0x02, 0x91, 0x01, 0x81, 0x00, 0x00, 0xd4, 0x30, 0x01, 0x43, 0x00, 0x12, 0xd5, 0xbd, 0xc0,
+ 0x30, 0x28, 0x37, 0x40, 0x28, 0x37, 0x44, 0x28, 0x37, 0x48, 0x28, 0x37, 0x4c, 0x23, 0x3d, 0x01,
+ 0x72, 0x33, 0xed, 0x03, 0x02, 0x00, 0x63, 0xff, 0xfc, 0x00, 0x00, 0x00, 0x10, 0xd5, 0xff, 0x91,
+ 0x00, 0x92, 0x01, 0x93, 0x02, 0x94, 0x03, 0x11, 0xd5, 0xfd, 0x82, 0x10, 0x92, 0x10, 0x11, 0xd5,
+ 0xaf, 0x83, 0x10, 0x03, 0x22, 0x02, 0x92, 0x10, 0x11, 0xd5, 0xfa, 0x12, 0xd5, 0xc1, 0x92, 0x10,
+ 0xc0, 0x40, 0x04, 0xe4, 0x16, 0x00, 0x02, 0x00, 0x11, 0xd5, 0xf1, 0x82, 0x10, 0x13, 0xd5, 0xa8,
+ 0x03, 0x22, 0x02, 0x92, 0x10, 0x04, 0xe4, 0x31, 0x84, 0x03, 0x83, 0x02, 0x82, 0x01, 0x81, 0x00,
+ 0x00, 0xd5, 0x30, 0x01, 0x53, 0x00, 0x00, 0x00, 0x6c, 0x10, 0x02, 0x6e, 0x32, 0x2f, 0xd6, 0x20,
+ 0x05, 0x6f, 0x04, 0x04, 0x3f, 0x04, 0x74, 0x5b, 0x2a, 0x05, 0x44, 0x0c, 0x00, 0x41, 0x04, 0x00,
+ 0x33, 0x1a, 0x22, 0x0a, 0x00, 0x6d, 0x49, 0x0d, 0x73, 0x63, 0x04, 0x03, 0x66, 0x0c, 0xb1, 0x22,
+ 0x0f, 0x22, 0x11, 0x03, 0x13, 0x14, 0x73, 0x63, 0x02, 0x22, 0x2c, 0x01, 0xd1, 0x0f, 0xc8, 0x3b,
+ 0xd1, 0x0f, 0x00, 0x00, 0x73, 0x63, 0x0c, 0xc0, 0x21, 0xd1, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x44, 0x49, 0x56, 0x30, 0xc0, 0x20, 0xd1, 0x0f, 0x6c, 0x10, 0x02, 0x00, 0x40, 0x04, 0x6b, 0x4c,
+ 0x07, 0x03, 0x23, 0x18, 0x02, 0x02, 0x19, 0xd1, 0x0f, 0x02, 0x03, 0x19, 0xc0, 0x20, 0xd1, 0x0f,
+ 0x6c, 0x10, 0x02, 0x02, 0xea, 0x30, 0xd1, 0x0f, 0x6c, 0x10, 0x02, 0xcc, 0x25, 0x03, 0xf0, 0x31,
+ 0x60, 0x00, 0x0f, 0x00, 0x6f, 0x22, 0x05, 0x03, 0xf1, 0x31, 0x60, 0x00, 0x05, 0x6f, 0x23, 0x05,
+ 0x03, 0xf2, 0x31, 0x00, 0x02, 0x00, 0xd1, 0x0f, 0x6c, 0x10, 0x02, 0xcc, 0x25, 0x02, 0xf0, 0x30,
+ 0xd1, 0x0f, 0x00, 0x00, 0x6f, 0x22, 0x04, 0x02, 0xf1, 0x30, 0xd1, 0x0f, 0x6f, 0x23, 0x04, 0x02,
+ 0xf2, 0x30, 0xd1, 0x0f, 0xc0, 0x20, 0xd1, 0x0f, 0x6c, 0x10, 0x02, 0x22, 0x0a, 0x20, 0x23, 0x0a,
+ 0x00, 0x6d, 0x28, 0x0e, 0x28, 0x37, 0x40, 0x28, 0x37, 0x44, 0x28, 0x37, 0x48, 0x28, 0x37, 0x4c,
+ 0x23, 0x3d, 0x01, 0x03, 0x02, 0x00, 0xd1, 0x0f, 0x6c, 0x10, 0x02, 0x02, 0xe4, 0x31, 0xd1, 0x0f,
+ 0x0a, 0x00, 0x00, 0x00, 0x43, 0x68, 0x65, 0x6c, 0x73, 0x69, 0x6f, 0x20, 0x46, 0x57, 0x20, 0x44,
+ 0x45, 0x42, 0x55, 0x47, 0x3d, 0x30, 0x20, 0x28, 0x42, 0x75, 0x69, 0x6c, 0x74, 0x20, 0x57, 0x65,
+ 0x64, 0x20, 0x4f, 0x63, 0x74, 0x20, 0x20, 0x38, 0x20, 0x31, 0x35, 0x3a, 0x35, 0x30, 0x3a, 0x35,
+ 0x30, 0x20, 0x50, 0x44, 0x54, 0x20, 0x32, 0x30, 0x30, 0x38, 0x20, 0x6f, 0x6e, 0x20, 0x63, 0x6c,
+ 0x65, 0x6f, 0x70, 0x61, 0x74, 0x72, 0x61, 0x3a, 0x2f, 0x68, 0x6f, 0x6d, 0x65, 0x2f, 0x66, 0x65,
+ 0x6c, 0x69, 0x78, 0x2f, 0x77, 0x2f, 0x66, 0x77, 0x5f, 0x37, 0x2e, 0x30, 0x29, 0x2c, 0x20, 0x56,
+ 0x65, 0x72, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x54, 0x33, 0x78, 0x78, 0x20, 0x30, 0x30, 0x37, 0x2e,
+ 0x30, 0x31, 0x2e, 0x30, 0x30, 0x20, 0x2d, 0x20, 0x31, 0x30, 0x30, 0x37, 0x30, 0x31, 0x30, 0x30,
+ 0x10, 0x07, 0x01, 0x00, 0x6f, 0x4e, 0xf8, 0xbb };
/* contents of t3b_protocol_sram-1.1.0.bin */
static u8 t3b_protocol_sram_data[] = {
@@ -1995,7 +2262,7 @@ struct t3_firmware_map {
/* this matches up the firmware names with the raw data files */
static struct t3_firmware_map fw_map[] = {
- { "t3fw-6.0.0.bin", t3fw_data , sizeof(t3fw_data), NULL},
+ { "t3fw-7.1.0.bin", t3fw_data , sizeof(t3fw_data), NULL},
{ "t3b_protocol_sram-1.1.0.bin", t3b_protocol_sram_data, sizeof(t3b_protocol_sram_data), NULL },
{ "t3c_protocol_sram-1.1.0.bin", t3c_protocol_sram_data, sizeof(t3c_protocol_sram_data), NULL },
};
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index c6ce5e0..1c7f116 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -194,21 +194,18 @@ int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
static void mi1_init(struct adapter *adap, const struct adapter_info *ai)
{
u32 clkdiv = adap->params.vpd.cclk / (2 * adap->params.vpd.mdc) - 1;
- u32 val = F_PREEN | V_MDIINV(ai->mdiinv) | V_MDIEN(ai->mdien) |
- V_CLKDIV(clkdiv);
+ u32 val = F_PREEN | V_CLKDIV(clkdiv);
- if (!(ai->caps & SUPPORTED_10000baseT_Full))
- val |= V_ST(1);
t3_write_reg(adap, A_MI1_CFG, val);
}
-#define MDIO_ATTEMPTS 10
+#define MDIO_ATTEMPTS 20
/*
- * MI1 read/write operations for direct-addressed PHYs.
+ * MI1 read/write operations for clause 22 PHYs.
*/
-static int mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr,
- int reg_addr, unsigned int *valp)
+static int t3_mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr,
+ int reg_addr, unsigned int *valp)
{
int ret;
u32 addr = V_REGADDR(reg_addr) | V_PHYADDR(phy_addr);
@@ -217,16 +214,17 @@ static int mi1_read(struct adapter *adapter, int phy_addr, int mmd_addr,
return -EINVAL;
mutex_lock(&adapter->mdio_lock);
+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(2));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
if (!ret)
*valp = t3_read_reg(adapter, A_MI1_DATA);
mutex_unlock(&adapter->mdio_lock);
return ret;
}
-static int mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
+static int t3_mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
int reg_addr, unsigned int val)
{
int ret;
@@ -236,37 +234,51 @@ static int mi1_write(struct adapter *adapter, int phy_addr, int mmd_addr,
return -EINVAL;
mutex_lock(&adapter->mdio_lock);
+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), V_ST(1));
t3_write_reg(adapter, A_MI1_ADDR, addr);
t3_write_reg(adapter, A_MI1_DATA, val);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 10);
mutex_unlock(&adapter->mdio_lock);
return ret;
}
static const struct mdio_ops mi1_mdio_ops = {
- mi1_read,
- mi1_write
+ t3_mi1_read,
+ t3_mi1_write
};
/*
+ * Performs the address cycle for clause 45 PHYs.
+ * Must be called with the MDIO_LOCK held.
+ */
+static int mi1_wr_addr(struct adapter *adapter, int phy_addr, int mmd_addr,
+ int reg_addr)
+{
+ u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
+
+ t3_set_reg_field(adapter, A_MI1_CFG, V_ST(M_ST), 0);
+ t3_write_reg(adapter, A_MI1_ADDR, addr);
+ t3_write_reg(adapter, A_MI1_DATA, reg_addr);
+ t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
+ return t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
+ MDIO_ATTEMPTS, 10);
+}
+
+/*
* MI1 read/write operations for indirect-addressed PHYs.
*/
static int mi1_ext_read(struct adapter *adapter, int phy_addr, int mmd_addr,
int reg_addr, unsigned int *valp)
{
int ret;
- u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
mutex_lock(&adapter->mdio_lock);
- t3_write_reg(adapter, A_MI1_ADDR, addr);
- t3_write_reg(adapter, A_MI1_DATA, reg_addr);
- t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr);
if (!ret) {
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(3));
ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
- MDIO_ATTEMPTS, 20);
+ MDIO_ATTEMPTS, 10);
if (!ret)
*valp = t3_read_reg(adapter, A_MI1_DATA);
}
@@ -278,18 +290,14 @@ static int mi1_ext_write(struct adapter *adapter, int phy_addr, int mmd_addr,
int reg_addr, unsigned int val)
{
int ret;
- u32 addr = V_REGADDR(mmd_addr) | V_PHYADDR(phy_addr);
mutex_lock(&adapter->mdio_lock);
- t3_write_reg(adapter, A_MI1_ADDR, addr);
- t3_write_reg(adapter, A_MI1_DATA, reg_addr);
- t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(0));
- ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0, MDIO_ATTEMPTS, 20);
+ ret = mi1_wr_addr(adapter, phy_addr, mmd_addr, reg_addr);
if (!ret) {
t3_write_reg(adapter, A_MI1_DATA, val);
t3_write_reg(adapter, A_MI1_OP, V_MDI_OP(1));
ret = t3_wait_op_done(adapter, A_MI1_OP, F_BUSY, 0,
- MDIO_ATTEMPTS, 20);
+ MDIO_ATTEMPTS, 10);
}
mutex_unlock(&adapter->mdio_lock);
return ret;
@@ -400,6 +408,29 @@ int t3_phy_advertise(struct cphy *phy, unsigned int advert)
}
/**
+ * t3_phy_advertise_fiber - set fiber PHY advertisement register
+ * @phy: the PHY to operate on
+ * @advert: bitmap of capabilities the PHY should advertise
+ *
+ * Sets a fiber PHY's advertisement register to advertise the
+ * requested capabilities.
+ */
+int t3_phy_advertise_fiber(struct cphy *phy, unsigned int advert)
+{
+ unsigned int val = 0;
+
+ if (advert & ADVERTISED_1000baseT_Half)
+ val |= ADVERTISE_1000XHALF;
+ if (advert & ADVERTISED_1000baseT_Full)
+ val |= ADVERTISE_1000XFULL;
+ if (advert & ADVERTISED_Pause)
+ val |= ADVERTISE_1000XPAUSE;
+ if (advert & ADVERTISED_Asym_Pause)
+ val |= ADVERTISE_1000XPSE_ASYM;
+ return mdio_write(phy, 0, MII_ADVERTISE, val);
+}
+
+/**
* t3_set_phy_speed_duplex - force PHY speed and duplex
* @phy: the PHY to operate on
* @speed: requested PHY speed
@@ -434,28 +465,60 @@ int t3_set_phy_speed_duplex(struct cphy *phy, int speed, int duplex)
return mdio_write(phy, 0, MII_BMCR, ctl);
}
+int t3_phy_lasi_intr_enable(struct cphy *phy)
+{
+ return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
+}
+
+int t3_phy_lasi_intr_disable(struct cphy *phy)
+{
+ return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
+}
+
+int t3_phy_lasi_intr_clear(struct cphy *phy)
+{
+ u32 val;
+
+ return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
+}
+
+int t3_phy_lasi_intr_handler(struct cphy *phy)
+{
+ unsigned int status;
+ int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status);
+
+ if (err)
+ return err;
+ return (status & 1) ? cphy_cause_link_change : 0;
+}
+
static const struct adapter_info t3_adap_info[] = {
- {2, 0, 0, 0,
+ {1, 1, 0,
F_GPIO2_OEN | F_GPIO4_OEN |
- F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
- 0,
+ F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0,
&mi1_mdio_ops, "Chelsio PE9000"},
- {2, 0, 0, 0,
+ {1, 1, 0,
F_GPIO2_OEN | F_GPIO4_OEN |
- F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
- 0,
+ F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0,
&mi1_mdio_ops, "Chelsio T302"},
- {1, 0, 0, 0,
+ {1, 0, 0,
F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
- 0, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+ { 0 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T310"},
- {2, 0, 0, 0,
+ {1, 1, 0,
F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
- F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
- SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+ F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
+ { S_GPIO9, S_GPIO3 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
&mi1_mdio_ext_ops, "Chelsio T320"},
+ {},
+ {},
+ {1, 0, 0,
+ F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO6_OEN | F_GPIO7_OEN |
+ F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
+ { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+ &mi1_mdio_ext_ops, "Chelsio T310" },
};
/*
@@ -467,29 +530,23 @@ const struct adapter_info *t3_get_adapter_info(unsigned int id)
return id < ARRAY_SIZE(t3_adap_info) ? &t3_adap_info[id] : NULL;
}
-#define CAPS_1G (SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full | \
- SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII)
-#define CAPS_10G (SUPPORTED_10000baseT_Full | SUPPORTED_AUI)
+struct port_type_info {
+ int (*phy_prep)(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *ops);
+};
static const struct port_type_info port_types[] = {
- {NULL},
- {t3_ael1002_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
- "10GBASE-XR"},
- {t3_vsc8211_phy_prep, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
- "10/100/1000BASE-T"},
- {NULL, CAPS_1G | SUPPORTED_TP | SUPPORTED_IRQ,
- "10/100/1000BASE-T"},
- {t3_xaui_direct_phy_prep, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
- {NULL, CAPS_10G, "10GBASE-KX4"},
- {t3_qt2045_phy_prep, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
- {t3_ael1006_phy_prep, CAPS_10G | SUPPORTED_FIBRE,
- "10GBASE-SR"},
- {NULL, CAPS_10G | SUPPORTED_TP, "10GBASE-CX4"},
+ { NULL },
+ { t3_ael1002_phy_prep },
+ { t3_vsc8211_phy_prep },
+ { NULL},
+ { t3_xaui_direct_phy_prep },
+ { t3_ael2005_phy_prep },
+ { t3_qt2045_phy_prep },
+ { t3_ael1006_phy_prep },
+ { NULL },
};
-#undef CAPS_1G
-#undef CAPS_10G
-
#define VPD_ENTRY(name, len) \
u8 name##_kword[2]; u8 name##_len; u8 name##_data[len]
@@ -875,11 +932,10 @@ int t3_get_tp_version(struct adapter *adapter, u32 *vers)
/**
* t3_check_tpsram_version - read the tp sram version
* @adapter: the adapter
- * @must_load: set to 1 if loading a new microcode image is required
*
* Reads the protocol sram version from flash.
*/
-int t3_check_tpsram_version(struct adapter *adapter, int *must_load)
+int t3_check_tpsram_version(struct adapter *adapter)
{
int ret;
u32 vers;
@@ -888,7 +944,6 @@ int t3_check_tpsram_version(struct adapter *adapter, int *must_load)
if (adapter->params.rev == T3_REV_A)
return 0;
- *must_load = 1;
ret = t3_get_tp_version(adapter, &vers);
if (ret)
@@ -899,13 +954,7 @@ int t3_check_tpsram_version(struct adapter *adapter, int *must_load)
if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR)
return 0;
-
- if (major != TP_VERSION_MAJOR)
- CH_ERR(adapter, "found wrong TP version (%u.%u), "
- "driver needs version %d.%d\n", major, minor,
- TP_VERSION_MAJOR, TP_VERSION_MINOR);
else {
- *must_load = 0;
CH_ERR(adapter, "found wrong TP version (%u.%u), "
"driver compiled for version %d.%d\n", major, minor,
TP_VERSION_MAJOR, TP_VERSION_MINOR);
@@ -962,18 +1011,16 @@ int t3_get_fw_version(struct adapter *adapter, u32 *vers)
/**
* t3_check_fw_version - check if the FW is compatible with this driver
* @adapter: the adapter
- * @must_load: set to 1 if loading a new FW image is required
-
+ *
* Checks if an adapter's FW is compatible with the driver. Returns 0
* if the versions are compatible, a negative error otherwise.
*/
-int t3_check_fw_version(struct adapter *adapter, int *must_load)
+int t3_check_fw_version(struct adapter *adapter)
{
int ret;
u32 vers;
unsigned int type, major, minor;
- *must_load = 1;
ret = t3_get_fw_version(adapter, &vers);
if (ret)
return ret;
@@ -985,17 +1032,11 @@ int t3_check_fw_version(struct adapter *adapter, int *must_load)
if (type == FW_VERSION_T3 && major == FW_VERSION_MAJOR &&
minor == FW_VERSION_MINOR)
return 0;
-
- if (major != FW_VERSION_MAJOR)
- CH_ERR(adapter, "found wrong FW version(%u.%u), "
- "driver needs version %u.%u\n", major, minor,
- FW_VERSION_MAJOR, FW_VERSION_MINOR);
- else if (minor < FW_VERSION_MINOR) {
- *must_load = 0;
+ else if (major != FW_VERSION_MAJOR || minor < FW_VERSION_MINOR)
CH_WARN(adapter, "found old FW minor version(%u.%u), "
"driver compiled for version %u.%u\n", major, minor,
FW_VERSION_MAJOR, FW_VERSION_MINOR);
- } else {
+ else {
CH_WARN(adapter, "found newer FW version(%u.%u), "
"driver compiled for version %u.%u\n", major, minor,
FW_VERSION_MAJOR, FW_VERSION_MINOR);
@@ -1112,6 +1153,38 @@ int t3_cim_ctl_blk_read(struct adapter *adap, unsigned int addr,
return ret;
}
+static void t3_gate_rx_traffic(struct cmac *mac, u32 *rx_cfg,
+ u32 *rx_hash_high, u32 *rx_hash_low)
+{
+ /* stop Rx unicast traffic */
+ t3_mac_disable_exact_filters(mac);
+
+ /* stop broadcast, multicast, promiscuous mode traffic */
+ *rx_cfg = t3_read_reg(mac->adapter, A_XGM_RX_CFG);
+ t3_set_reg_field(mac->adapter, A_XGM_RX_CFG,
+ F_ENHASHMCAST | F_DISBCAST | F_COPYALLFRAMES,
+ F_DISBCAST);
+
+ *rx_hash_high = t3_read_reg(mac->adapter, A_XGM_RX_HASH_HIGH);
+ t3_write_reg(mac->adapter, A_XGM_RX_HASH_HIGH, 0);
+
+ *rx_hash_low = t3_read_reg(mac->adapter, A_XGM_RX_HASH_LOW);
+ t3_write_reg(mac->adapter, A_XGM_RX_HASH_LOW, 0);
+
+ /* Leave time to drain max RX fifo */
+ msleep(1);
+}
+
+static void t3_open_rx_traffic(struct cmac *mac, u32 rx_cfg,
+ u32 rx_hash_high, u32 rx_hash_low)
+{
+ t3_mac_enable_exact_filters(mac);
+ t3_set_reg_field(mac->adapter, A_XGM_RX_CFG,
+ F_ENHASHMCAST | F_DISBCAST | F_COPYALLFRAMES,
+ rx_cfg);
+ t3_write_reg(mac->adapter, A_XGM_RX_HASH_HIGH, rx_hash_high);
+ t3_write_reg(mac->adapter, A_XGM_RX_HASH_LOW, rx_hash_low);
+}
/**
* t3_link_changed - handle interface link changes
@@ -1132,6 +1205,32 @@ void t3_link_changed(struct adapter *adapter, int port_id)
phy->ops->get_link_status(phy, &link_ok, &speed, &duplex, &fc);
+ if (!lc->link_ok && link_ok) {
+ u32 rx_cfg, rx_hash_high, rx_hash_low;
+ u32 status;
+
+ t3_xgm_intr_enable(adapter, port_id);
+ t3_gate_rx_traffic(mac, &rx_cfg, &rx_hash_high, &rx_hash_low);
+ t3_write_reg(adapter, A_XGM_RX_CTRL + mac->offset, 0);
+ t3_mac_enable(mac, MAC_DIRECTION_RX);
+
+ status = t3_read_reg(adapter, A_XGM_INT_STATUS + mac->offset);
+ if (status & F_LINKFAULTCHANGE) {
+ mac->stats.link_faults++;
+ pi->link_fault = 1;
+ }
+ t3_open_rx_traffic(mac, rx_cfg, rx_hash_high, rx_hash_low);
+ }
+
+ if (lc->requested_fc & PAUSE_AUTONEG)
+ fc &= lc->requested_fc;
+ else
+ fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
+
+ if (link_ok == lc->link_ok && speed == lc->speed &&
+ duplex == lc->duplex && fc == lc->fc)
+ return; /* nothing changed */
+
if (link_ok != lc->link_ok && adapter->params.rev > 0 &&
uses_xaui(adapter)) {
if (link_ok)
@@ -1142,10 +1241,6 @@ void t3_link_changed(struct adapter *adapter, int port_id)
lc->link_ok = link_ok;
lc->speed = speed < 0 ? SPEED_INVALID : speed;
lc->duplex = duplex < 0 ? DUPLEX_INVALID : duplex;
- if (lc->requested_fc & PAUSE_AUTONEG)
- fc &= lc->requested_fc;
- else
- fc = lc->requested_fc & (PAUSE_RX | PAUSE_TX);
if (link_ok && speed >= 0 && lc->autoneg == AUTONEG_ENABLE) {
/* Set MAC speed, duplex, and flow control to match PHY. */
@@ -1156,6 +1251,54 @@ void t3_link_changed(struct adapter *adapter, int port_id)
t3_os_link_changed(adapter, port_id, link_ok, speed, duplex, fc);
}
+void t3_link_fault(struct adapter *adapter, int port_id)
+{
+ struct port_info *pi = adap2pinfo(adapter, port_id);
+ struct cmac *mac = &pi->mac;
+ struct cphy *phy = &pi->phy;
+ struct link_config *lc = &pi->link_config;
+ int link_ok, speed, duplex, fc, link_fault;
+ u32 rx_cfg, rx_hash_high, rx_hash_low;
+
+ t3_gate_rx_traffic(mac, &rx_cfg, &rx_hash_high, &rx_hash_low);
+
+ if (adapter->params.rev > 0 && uses_xaui(adapter))
+ t3_write_reg(adapter, A_XGM_XAUI_ACT_CTRL + mac->offset, 0);
+
+ t3_write_reg(adapter, A_XGM_RX_CTRL + mac->offset, 0);
+ t3_mac_enable(mac, MAC_DIRECTION_RX);
+
+ t3_open_rx_traffic(mac, rx_cfg, rx_hash_high, rx_hash_low);
+
+ link_fault = t3_read_reg(adapter,
+ A_XGM_INT_STATUS + mac->offset);
+ link_fault &= F_LINKFAULTCHANGE;
+
+ phy->ops->get_link_status(phy, &link_ok, &speed, &duplex, &fc);
+
+ if (link_fault) {
+ lc->link_ok = 0;
+ lc->speed = SPEED_INVALID;
+ lc->duplex = DUPLEX_INVALID;
+
+ t3_os_link_fault(adapter, port_id, 0);
+
+ /* Account link faults only when the phy reports a link up */
+ if (link_ok)
+ mac->stats.link_faults++;
+ } else {
+ if (link_ok)
+ t3_write_reg(adapter, A_XGM_XAUI_ACT_CTRL + mac->offset,
+ F_TXACTENABLE | F_RXEN);
+
+ pi->link_fault = 0;
+ lc->link_ok = (unsigned char)link_ok;
+ lc->speed = speed < 0 ? SPEED_INVALID : speed;
+ lc->duplex = duplex < 0 ? DUPLEX_INVALID : duplex;
+ t3_os_link_fault(adapter, port_id, link_ok);
+ }
+}
+
/**
* t3_link_start - apply link configuration to MAC/PHY
* @phy: the PHY to setup
@@ -1191,7 +1334,6 @@ int t3_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc)
fc);
/* Also disables autoneg */
phy->ops->set_speed_duplex(phy, lc->speed, lc->duplex);
- phy->ops->reset(phy, 0);
} else
phy->ops->autoneg_enable(phy);
} else {
@@ -1221,7 +1363,7 @@ struct intr_info {
unsigned int mask; /* bits to check in interrupt status */
const char *msg; /* message to print or NULL */
short stat_idx; /* stat counter to increment or -1 */
- unsigned short fatal:1; /* whether the condition reported is fatal */
+ unsigned short fatal; /* whether the condition reported is fatal */
};
/**
@@ -1278,7 +1420,7 @@ static int t3_handle_intr_status(struct adapter *adapter, unsigned int reg,
#define MC7_INTR_MASK (F_AE | F_UE | F_CE | V_PE(M_PE))
#define XGM_INTR_MASK (V_TXFIFO_PRTY_ERR(M_TXFIFO_PRTY_ERR) | \
V_RXFIFO_PRTY_ERR(M_RXFIFO_PRTY_ERR) | \
- F_TXFIFO_UNDERRUN | F_RXFIFO_OVERFLOW)
+ F_TXFIFO_UNDERRUN)
#define PCIX_INTR_MASK (F_MSTDETPARERR | F_SIGTARABT | F_RCVTARABT | \
F_RCVMSTABT | F_SIGSYSERR | F_DETPARERR | \
F_SPLCMPDIS | F_UNXSPLCMP | F_RCVSPLCMPERR | \
@@ -1315,11 +1457,11 @@ static int t3_handle_intr_status(struct adapter *adapter, unsigned int reg,
V_TX1TPPARERRENB(M_TX1TPPARERRENB) | \
V_RXTPPARERRENB(M_RXTPPARERRENB) | \
V_MCAPARERRENB(M_MCAPARERRENB))
+#define XGM_EXTRA_INTR_MASK (F_LINKFAULTCHANGE)
#define PL_INTR_MASK (F_T3DBG | F_XGMAC0_0 | F_XGMAC0_1 | F_MC5A | F_PM1_TX | \
F_PM1_RX | F_ULP2_TX | F_ULP2_RX | F_TP1 | F_CIM | \
F_MC7_CM | F_MC7_PMTX | F_MC7_PMRX | F_SGE3 | F_PCIM0 | \
F_MPS0 | F_CPL_SWITCH)
-
/*
* Interrupt handler for the PCIX1 module.
*/
@@ -1650,7 +1792,14 @@ static void mc7_intr_handler(struct mc7 *mc7)
static int mac_intr_handler(struct adapter *adap, unsigned int idx)
{
struct cmac *mac = &adap2pinfo(adap, idx)->mac;
- u32 cause = t3_read_reg(adap, A_XGM_INT_CAUSE + mac->offset);
+ /*
+ * We mask out interrupt causes for which we're not taking interrupts.
+ * This allows us to use polling logic to monitor some of the other
+ * conditions when taking interrupts would impose too much load on the
+ * system.
+ */
+ u32 cause = t3_read_reg(adap, A_XGM_INT_CAUSE + mac->offset) &
+ ~F_RXFIFO_OVERFLOW;
if (cause & V_TXFIFO_PRTY_ERR(M_TXFIFO_PRTY_ERR)) {
mac->stats.tx_fifo_parity_err++;
@@ -1670,10 +1819,20 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx)
mac->stats.xaui_pcs_ctc_err++;
if (cause & F_XAUIPCSALIGNCHANGE)
mac->stats.xaui_pcs_align_change++;
+ if (cause & F_XGM_INT) {
+ t3_set_reg_field(adap,
+ A_XGM_INT_ENABLE + mac->offset,
+ F_XGM_INT, 0);
+ mac->stats.link_faults++;
+
+ t3_os_link_fault_handler(adap, idx);
+ }
t3_write_reg(adap, A_XGM_INT_CAUSE + mac->offset, cause);
+
if (cause & XGM_INTR_FATAL)
t3_fatal_err(adap);
+
return cause != 0;
}
@@ -1682,25 +1841,23 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx)
*/
int t3_phy_intr_handler(struct adapter *adapter)
{
- u32 mask, gpi = adapter_info(adapter)->gpio_intr;
u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE);
for_each_port(adapter, i) {
struct port_info *p = adap2pinfo(adapter, i);
- mask = gpi - (gpi & (gpi - 1));
- gpi -= mask;
-
- if (!(p->port_type->caps & SUPPORTED_IRQ))
+ if (!(p->phy.caps & SUPPORTED_IRQ))
continue;
- if (cause & mask) {
+ if (cause & (1 << adapter_info(adapter)->gpio_intr[i])) {
int phy_cause = p->phy.ops->intr_handler(&p->phy);
if (phy_cause & cphy_cause_link_change)
t3_link_changed(adapter, i);
if (phy_cause & cphy_cause_fifo_error)
p->phy.fifo_errors++;
+ if (phy_cause & cphy_cause_module_change)
+ t3_os_phymod_changed(adapter, i);
}
}
@@ -1763,6 +1920,17 @@ int t3_slow_intr_handler(struct adapter *adapter)
return 1;
}
+static unsigned int calc_gpio_intr(struct adapter *adap)
+{
+ unsigned int i, gpi_intr = 0;
+
+ for_each_port(adap, i)
+ if ((adap2pinfo(adap, i)->phy.caps & SUPPORTED_IRQ) &&
+ adapter_info(adap)->gpio_intr[i])
+ gpi_intr |= 1 << adapter_info(adap)->gpio_intr[i];
+ return gpi_intr;
+}
+
/**
* t3_intr_enable - enable interrupts
* @adapter: the adapter whose interrupts should be enabled
@@ -1805,10 +1973,8 @@ void t3_intr_enable(struct adapter *adapter)
t3_write_reg(adapter, A_ULPTX_INT_ENABLE, ULPTX_INTR_MASK);
}
- t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW,
- adapter_info(adapter)->gpio_intr);
- t3_write_reg(adapter, A_T3DBG_INT_ENABLE,
- adapter_info(adapter)->gpio_intr);
+ t3_write_reg(adapter, A_T3DBG_INT_ENABLE, calc_gpio_intr(adapter));
+
if (is_pcie(adapter))
t3_write_reg(adapter, A_PCIE_INT_ENABLE, PCIE_INTR_MASK);
else
@@ -1872,6 +2038,22 @@ void t3_intr_clear(struct adapter *adapter)
t3_read_reg(adapter, A_PL_INT_CAUSE0); /* flush */
}
+void t3_xgm_intr_enable(struct adapter *adapter, int idx)
+{
+ struct port_info *pi = adap2pinfo(adapter, idx);
+
+ t3_write_reg(adapter, A_XGM_XGM_INT_ENABLE + pi->mac.offset,
+ XGM_EXTRA_INTR_MASK);
+}
+
+void t3_xgm_intr_disable(struct adapter *adapter, int idx)
+{
+ struct port_info *pi = adap2pinfo(adapter, idx);
+
+ t3_write_reg(adapter, A_XGM_XGM_INT_DISABLE + pi->mac.offset,
+ 0x7ff);
+}
+
/**
* t3_port_intr_enable - enable port-specific interrupts
* @adapter: associated adapter
@@ -1937,16 +2119,40 @@ void t3_port_intr_clear(struct adapter *adapter, int idx)
static int t3_sge_write_context(struct adapter *adapter, unsigned int id,
unsigned int type)
{
- t3_write_reg(adapter, A_SG_CONTEXT_MASK0, 0xffffffff);
- t3_write_reg(adapter, A_SG_CONTEXT_MASK1, 0xffffffff);
- t3_write_reg(adapter, A_SG_CONTEXT_MASK2, 0xffffffff);
- t3_write_reg(adapter, A_SG_CONTEXT_MASK3, 0xffffffff);
+ if (type == F_RESPONSEQ) {
+ /*
+ * Can't write the Response Queue Context bits for
+ * Interrupt Armed or the Reserve bits after the chip
+ * has been initialized out of reset. Writing to these
+ * bits can confuse the hardware.
+ */
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK0, 0xffffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK1, 0xffffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK2, 0x17ffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK3, 0xffffffff);
+ } else {
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK0, 0xffffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK1, 0xffffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK2, 0xffffffff);
+ t3_write_reg(adapter, A_SG_CONTEXT_MASK3, 0xffffffff);
+ }
t3_write_reg(adapter, A_SG_CONTEXT_CMD,
V_CONTEXT_CMD_OPCODE(1) | type | V_CONTEXT(id));
return t3_wait_op_done(adapter, A_SG_CONTEXT_CMD, F_CONTEXT_CMD_BUSY,
0, SG_CONTEXT_CMD_ATTEMPTS, 1);
}
+/**
+ * clear_sge_ctxt - completely clear an SGE context
+ * @adapter: the adapter
+ * @id: the context id
+ * @type: the context type
+ *
+ * Completely clear an SGE context. Used predominantly at post-reset
+ * initialization. Note in particular that we don't skip writing to any
+ * "sensitive bits" in the contexts the way that t3_sge_write_context()
+ * does ...
+ */
static int clear_sge_ctxt(struct adapter *adap, unsigned int id,
unsigned int type)
{
@@ -1954,7 +2160,14 @@ static int clear_sge_ctxt(struct adapter *adap, unsigned int id,
t3_write_reg(adap, A_SG_CONTEXT_DATA1, 0);
t3_write_reg(adap, A_SG_CONTEXT_DATA2, 0);
t3_write_reg(adap, A_SG_CONTEXT_DATA3, 0);
- return t3_sge_write_context(adap, id, type);
+ t3_write_reg(adap, A_SG_CONTEXT_MASK0, 0xffffffff);
+ t3_write_reg(adap, A_SG_CONTEXT_MASK1, 0xffffffff);
+ t3_write_reg(adap, A_SG_CONTEXT_MASK2, 0xffffffff);
+ t3_write_reg(adap, A_SG_CONTEXT_MASK3, 0xffffffff);
+ t3_write_reg(adap, A_SG_CONTEXT_CMD,
+ V_CONTEXT_CMD_OPCODE(1) | type | V_CONTEXT(id));
+ return t3_wait_op_done(adap, A_SG_CONTEXT_CMD, F_CONTEXT_CMD_BUSY,
+ 0, SG_CONTEXT_CMD_ATTEMPTS, 1);
}
/**
@@ -2538,10 +2751,10 @@ static void tp_config(struct adapter *adap, const struct tp_params *p)
F_TCPCHECKSUMOFFLOAD | V_IPTTL(64));
t3_write_reg(adap, A_TP_TCP_OPTIONS, V_MTUDEFAULT(576) |
F_MTUENABLE | V_WINDOWSCALEMODE(1) |
- V_TIMESTAMPSMODE(0) | V_SACKMODE(1) | V_SACKRX(1));
+ V_TIMESTAMPSMODE(1) | V_SACKMODE(1) | V_SACKRX(1));
t3_write_reg(adap, A_TP_DACK_CONFIG, V_AUTOSTATE3(1) |
V_AUTOSTATE2(1) | V_AUTOSTATE1(0) |
- V_BYTETHRESHOLD(16384) | V_MSSTHRESHOLD(2) |
+ V_BYTETHRESHOLD(26880) | V_MSSTHRESHOLD(2) |
F_AUTOCAREFUL | F_AUTOENABLE | V_DACK_MODE(1));
t3_set_reg_field(adap, A_TP_IN_CONFIG, F_RXFBARBPRIO | F_TXFBARBPRIO,
F_IPV6ENABLE | F_NICMODE);
@@ -3005,20 +3218,22 @@ int t3_mps_set_active_ports(struct adapter *adap, unsigned int port_mask)
}
/*
- * Perform the bits of HW initialization that are dependent on the number
- * of available ports.
+ * Perform the bits of HW initialization that are dependent on the Tx
+ * channels being used.
*/
-static void init_hw_for_avail_ports(struct adapter *adap, int nports)
+static void chan_init_hw(struct adapter *adap, unsigned int chan_map)
{
int i;
- if (nports == 1) {
+ if (chan_map != 3) { /* one channel */
t3_set_reg_field(adap, A_ULPRX_CTL, F_ROUND_ROBIN, 0);
t3_set_reg_field(adap, A_ULPTX_CONFIG, F_CFG_RR_ARB, 0);
- t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_TPTXPORT0EN |
- F_PORT0ACTIVE | F_ENFORCEPKT);
- t3_write_reg(adap, A_PM1_TX_CFG, 0xffffffff);
- } else {
+ t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT |
+ (chan_map == 1 ? F_TPTXPORT0EN | F_PORT0ACTIVE :
+ F_TPTXPORT1EN | F_PORT1ACTIVE));
+ t3_write_reg(adap, A_PM1_TX_CFG,
+ chan_map == 1 ? 0xffffffff : 0);
+ } else { /* two channels */
t3_set_reg_field(adap, A_ULPRX_CTL, 0, F_ROUND_ROBIN);
t3_set_reg_field(adap, A_ULPTX_CONFIG, 0, F_CFG_RR_ARB);
t3_write_reg(adap, A_ULPTX_DMA_WEIGHT,
@@ -3265,6 +3480,7 @@ static void config_pcie(struct adapter *adap)
t3_write_reg(adap, A_PCIE_PEX_ERR, 0xffffffff);
t3_set_reg_field(adap, A_PCIE_CFG, 0,
+ F_ENABLELINKDWNDRST | F_ENABLELINKDOWNRST |
F_PCIE_DMASTOPEN | F_PCIE_CLIDECEN);
}
@@ -3325,9 +3541,11 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params)
t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff);
t3_write_reg(adapter, A_PM1_RX_MODE, 0);
t3_write_reg(adapter, A_PM1_TX_MODE, 0);
- init_hw_for_avail_ports(adapter, adapter->params.nports);
+ chan_init_hw(adapter, adapter->params.chan_map);
t3_sge_init(adapter, &adapter->params.sge);
+ t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW, calc_gpio_intr(adapter));
+
t3_write_reg(adapter, A_CIM_HOST_ACC_DATA, vpd->uclk | fw_params);
t3_write_reg(adapter, A_CIM_BOOT_CFG,
V_BOOTADDR(FW_FLASH_BOOT_ADDR >> 2));
@@ -3487,7 +3705,7 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai)
* Older PCIe cards lose their config space during reset, PCI-X
* ones don't.
*/
-static int t3_reset_adapter(struct adapter *adapter)
+int t3_reset_adapter(struct adapter *adapter)
{
int i, save_and_restore_pcie =
adapter->params.rev < T3_REV_B2 && is_pcie(adapter);
@@ -3555,14 +3773,23 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
int reset)
{
int ret;
- unsigned int i, j = 0;
+ unsigned int i, j = -1;
get_pci_mode(adapter, &adapter->params.pci);
adapter->params.info = ai;
- adapter->params.nports = ai->nports;
+ adapter->params.nports = ai->nports0 + ai->nports1;
+ adapter->params.chan_map = !!ai->nports0 | (!!ai->nports1 << 1);
adapter->params.rev = t3_read_reg(adapter, A_PL_REV);
- adapter->params.linkpoll_period = 0;
+ /*
+ * We used to only run the "adapter check task" once a second if
+ * we had PHYs which didn't support interrupts (we would check
+ * their link status once a second). Now we check other conditions
+ * in that routine which could potentially impose a very high
+ * interrupt load on the system. As such, we now always scan the
+ * adapter state once a second ...
+ */
+ adapter->params.linkpoll_period = 10;
adapter->params.stats_update_period = is_10G(adapter) ?
MAC_STATS_ACCUM_SECS : (MAC_STATS_ACCUM_SECS * 10);
adapter->params.pci.vpd_cap_addr =
@@ -3583,7 +3810,7 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
mc7_prep(adapter, &adapter->pmtx, MC7_PMTX_BASE_ADDR, "PMTX");
mc7_prep(adapter, &adapter->cm, MC7_CM_BASE_ADDR, "CM");
- p->nchan = ai->nports;
+ p->nchan = adapter->params.chan_map == 3 ? 2 : 1;
p->pmrx_size = t3_mc7_size(&adapter->pmrx);
p->pmtx_size = t3_mc7_size(&adapter->pmtx);
p->cm_size = t3_mc7_size(&adapter->cm);
@@ -3619,22 +3846,24 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
for_each_port(adapter, i) {
u8 hw_addr[6];
+ const struct port_type_info *pti;
struct port_info *p = adap2pinfo(adapter, i);
- while (!adapter->params.vpd.port_type[j])
- ++j;
+ while (!adapter->params.vpd.port_type[++j])
+ ;
- p->port_type = &port_types[adapter->params.vpd.port_type[j]];
- if (!p->port_type->phy_prep) {
+ pti = &port_types[adapter->params.vpd.port_type[j]];
+ if (!pti->phy_prep) {
CH_ALERT(adapter, "Invalid port type index %d\n",
adapter->params.vpd.port_type[j]);
return -EINVAL;
}
- p->port_type->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
- ai->mdio_ops);
+ ret = pti->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
+ ai->mdio_ops);
+ if (ret)
+ return ret;
mac_prep(&p->mac, adapter, j);
- ++j;
/*
* The VPD EEPROM stores the base Ethernet address for the
@@ -3648,9 +3877,16 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai,
ETH_ALEN);
memcpy(adapter->port[i]->perm_addr, hw_addr,
ETH_ALEN);
- init_link_config(&p->link_config, p->port_type->caps);
+ init_link_config(&p->link_config, p->phy.caps);
p->phy.ops->power_down(&p->phy, 1);
- if (!(p->port_type->caps & SUPPORTED_IRQ))
+
+ /*
+ * If the PHY doesn't support interrupts for link status
+ * changes, schedule a scan of the adapter links at least
+ * once a second.
+ */
+ if (!(p->phy.caps & SUPPORTED_IRQ) &&
+ adapter->params.linkpoll_period > 10)
adapter->params.linkpoll_period = 10;
}
@@ -3662,3 +3898,32 @@ void t3_led_ready(struct adapter *adapter)
t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
F_GPIO0_OUT_VAL);
}
+
+int t3_replay_prep_adapter(struct adapter *adapter)
+{
+ const struct adapter_info *ai = adapter->params.info;
+ unsigned int i, j = -1;
+ int ret;
+
+ early_hw_init(adapter, ai);
+ ret = init_parity(adapter);
+ if (ret)
+ return ret;
+
+ for_each_port(adapter, i) {
+ const struct port_type_info *pti;
+ struct port_info *p = adap2pinfo(adapter, i);
+
+ while (!adapter->params.vpd.port_type[++j])
+ ;
+
+ pti = &port_types[adapter->params.vpd.port_type[j]];
+ ret = pti->phy_prep(&p->phy, adapter, p->phy.addr, NULL);
+ if (ret)
+ return ret;
+ p->phy.ops->power_down(&p->phy, 1);
+ }
+
+ return 0;
+}
+
diff --git a/drivers/net/cxgb3/t3cdev.h b/drivers/net/cxgb3/t3cdev.h
index 0a21cfb..be55e9a 100644
--- a/drivers/net/cxgb3/t3cdev.h
+++ b/drivers/net/cxgb3/t3cdev.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006-2007 Chelsio Communications. All rights reserved.
+ * Copyright (C) 2006-2008 Chelsio Communications. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
diff --git a/drivers/net/cxgb3/version.h b/drivers/net/cxgb3/version.h
index 8d38d1c..7bf963e 100644
--- a/drivers/net/cxgb3/version.h
+++ b/drivers/net/cxgb3/version.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -35,7 +35,7 @@
#define DRV_DESC "Chelsio T3 Network Driver"
#define DRV_NAME "cxgb3"
/* Driver version */
-#define DRV_VERSION "1.0-ofed"
+#define DRV_VERSION "1.1.2-ko"
/* Firmware version */
#define FW_VERSION_MAJOR 7
diff --git a/drivers/net/cxgb3/vsc8211.c b/drivers/net/cxgb3/vsc8211.c
index eee4285..33f956b 100644
--- a/drivers/net/cxgb3/vsc8211.c
+++ b/drivers/net/cxgb3/vsc8211.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -33,28 +33,40 @@
/* VSC8211 PHY specific registers. */
enum {
+ VSC8211_SIGDET_CTRL = 19,
+ VSC8211_EXT_CTRL = 23,
VSC8211_INTR_ENABLE = 25,
VSC8211_INTR_STATUS = 26,
+ VSC8211_LED_CTRL = 27,
VSC8211_AUX_CTRL_STAT = 28,
+ VSC8211_EXT_PAGE_AXS = 31,
};
enum {
VSC_INTR_RX_ERR = 1 << 0,
- VSC_INTR_MS_ERR = 1 << 1, /* master/slave resolution error */
- VSC_INTR_CABLE = 1 << 2, /* cable impairment */
- VSC_INTR_FALSE_CARR = 1 << 3, /* false carrier */
- VSC_INTR_MEDIA_CHG = 1 << 4, /* AMS media change */
- VSC_INTR_RX_FIFO = 1 << 5, /* Rx FIFO over/underflow */
- VSC_INTR_TX_FIFO = 1 << 6, /* Tx FIFO over/underflow */
- VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
- VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */
- VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
- VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
- VSC_INTR_LINK_CHG = 1 << 13, /* link change */
- VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
+ VSC_INTR_MS_ERR = 1 << 1, /* master/slave resolution error */
+ VSC_INTR_CABLE = 1 << 2, /* cable impairment */
+ VSC_INTR_FALSE_CARR = 1 << 3, /* false carrier */
+ VSC_INTR_MEDIA_CHG = 1 << 4, /* AMS media change */
+ VSC_INTR_RX_FIFO = 1 << 5, /* Rx FIFO over/underflow */
+ VSC_INTR_TX_FIFO = 1 << 6, /* Tx FIFO over/underflow */
+ VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */
+ VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */
+ VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */
+ VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */
+ VSC_INTR_DPLX_CHG = 1 << 12, /* duplex change */
+ VSC_INTR_LINK_CHG = 1 << 13, /* link change */
+ VSC_INTR_SPD_CHG = 1 << 14, /* speed change */
+ VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */
+};
+
+enum {
+ VSC_CTRL_CLAUSE37_VIEW = 1 << 4, /* Switch to Clause 37 view */
+ VSC_CTRL_MEDIA_MODE_HI = 0xf000 /* High part of media mode select */
};
#define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \
+ VSC_INTR_DPLX_CHG | VSC_INTR_SPD_CHG | \
VSC_INTR_NEG_DONE)
#define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \
VSC_INTR_ENABLE)
@@ -184,6 +196,112 @@ static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok,
return 0;
}
+static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok,
+ int *speed, int *duplex, int *fc)
+{
+ unsigned int bmcr, status, lpa, adv;
+ int err, sp = -1, dplx = -1, pause = 0;
+
+ err = mdio_read(cphy, 0, MII_BMCR, &bmcr);
+ if (!err)
+ err = mdio_read(cphy, 0, MII_BMSR, &status);
+ if (err)
+ return err;
+
+ if (link_ok) {
+ /*
+ * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
+ * once more to get the current link state.
+ */
+ if (!(status & BMSR_LSTATUS))
+ err = mdio_read(cphy, 0, MII_BMSR, &status);
+ if (err)
+ return err;
+ *link_ok = (status & BMSR_LSTATUS) != 0;
+ }
+ if (!(bmcr & BMCR_ANENABLE)) {
+ dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF;
+ if (bmcr & BMCR_SPEED1000)
+ sp = SPEED_1000;
+ else if (bmcr & BMCR_SPEED100)
+ sp = SPEED_100;
+ else
+ sp = SPEED_10;
+ } else if (status & BMSR_ANEGCOMPLETE) {
+ err = mdio_read(cphy, 0, MII_LPA, &lpa);
+ if (!err)
+ err = mdio_read(cphy, 0, MII_ADVERTISE, &adv);
+ if (err)
+ return err;
+
+ if (adv & lpa & ADVERTISE_1000XFULL) {
+ dplx = DUPLEX_FULL;
+ sp = SPEED_1000;
+ } else if (adv & lpa & ADVERTISE_1000XHALF) {
+ dplx = DUPLEX_HALF;
+ sp = SPEED_1000;
+ }
+
+ if (fc && dplx == DUPLEX_FULL) {
+ if (lpa & adv & ADVERTISE_1000XPAUSE)
+ pause = PAUSE_RX | PAUSE_TX;
+ else if ((lpa & ADVERTISE_1000XPAUSE) &&
+ (adv & lpa & ADVERTISE_1000XPSE_ASYM))
+ pause = PAUSE_TX;
+ else if ((lpa & ADVERTISE_1000XPSE_ASYM) &&
+ (adv & ADVERTISE_1000XPAUSE))
+ pause = PAUSE_RX;
+ }
+ }
+ if (speed)
+ *speed = sp;
+ if (duplex)
+ *duplex = dplx;
+ if (fc)
+ *fc = pause;
+ return 0;
+}
+
+/*
+ * Enable/disable auto MDI/MDI-X in forced link speed mode.
+ */
+static int vsc8211_set_automdi(struct cphy *phy, int enable)
+{
+ int err;
+
+ err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, 18, 0x12);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, 16, 0x87fa);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
+ if (err)
+ return err;
+
+ return 0;
+}
+
+int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex)
+{
+ int err;
+
+ err = t3_set_phy_speed_duplex(phy, speed, duplex);
+ if (!err)
+ err = vsc8211_set_automdi(phy, 1);
+ return err;
+}
+
static int vsc8211_power_down(struct cphy *cphy, int enable)
{
return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN,
@@ -221,8 +339,66 @@ static struct cphy_ops vsc8211_ops = {
.power_down = vsc8211_power_down,
};
-void t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
- int phy_addr, const struct mdio_ops *mdio_ops)
+static struct cphy_ops vsc8211_fiber_ops = {
+ .reset = vsc8211_reset,
+ .intr_enable = vsc8211_intr_enable,
+ .intr_disable = vsc8211_intr_disable,
+ .intr_clear = vsc8211_intr_clear,
+ .intr_handler = vsc8211_intr_handler,
+ .autoneg_enable = vsc8211_autoneg_enable,
+ .autoneg_restart = vsc8211_autoneg_restart,
+ .advertise = t3_phy_advertise_fiber,
+ .set_speed_duplex = t3_set_phy_speed_duplex,
+ .get_link_status = vsc8211_get_link_status_fiber,
+ .power_down = vsc8211_power_down,
+};
+
+int t3_vsc8211_phy_prep(struct cphy *phy, struct adapter *adapter,
+ int phy_addr, const struct mdio_ops *mdio_ops)
{
- cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops);
+ int err;
+ unsigned int val;
+
+ cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops,
+ SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full |
+ SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII |
+ SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T");
+ msleep(20); /* PHY needs ~10ms to start responding to MDIO */
+
+ err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val);
+ if (err)
+ return err;
+ if (val & VSC_CTRL_MEDIA_MODE_HI) {
+ /* copper interface, just need to configure the LEDs */
+ return mdio_write(phy, 0, VSC8211_LED_CTRL, 0x100);
+ }
+
+ phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg |
+ SUPPORTED_MII | SUPPORTED_FIBRE | SUPPORTED_IRQ;
+ phy->desc = "1000BASE-X";
+ phy->ops = &vsc8211_fiber_ops;
+
+ err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 1);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, VSC8211_SIGDET_CTRL, 1);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0);
+ if (err)
+ return err;
+
+ err = mdio_write(phy, 0, VSC8211_EXT_CTRL,
+ val | VSC_CTRL_CLAUSE37_VIEW);
+ if (err)
+ return err;
+
+ err = vsc8211_reset(phy, 0);
+ if (err)
+ return err;
+
+ udelay(5); /* delay after reset before next SMI */
+ return 0;
}
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c
index ffdc0a1..f87f943 100644
--- a/drivers/net/cxgb3/xgmac.c
+++ b/drivers/net/cxgb3/xgmac.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2005-2007 Chelsio, Inc. All rights reserved.
+ * Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -150,7 +150,8 @@ int t3_mac_reset(struct cmac *mac)
static int t3b2_mac_reset(struct cmac *mac)
{
struct adapter *adap = mac->adapter;
- unsigned int oft = mac->offset;
+ unsigned int oft = mac->offset, store;
+ int idx = macidx(mac);
u32 val;
if (!macidx(mac))
@@ -158,14 +159,28 @@ static int t3b2_mac_reset(struct cmac *mac)
else
t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0);
+ /* Stop NIC traffic to reduce the number of TXTOGGLES */
+ t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 0);
+ /* Ensure TX drains */
+ t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN, 0);
+
t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */
+ /* Store A_TP_TX_DROP_CFG_CH0 */
+ t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
+ store = t3_read_reg(adap, A_TP_TX_DROP_CFG_CH0 + idx);
+
msleep(10);
+ /* Change DROP_CFG to 0xc0000011 */
+ t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
+ t3_write_reg(adap, A_TP_PIO_DATA, 0xc0000011);
+
/* Check for xgm Rx fifo empty */
+ /* Increased loop count to 1000 from 5 cover 1G and 100Mbps case */
if (t3_wait_op_done(adap, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + oft,
- 0x80000000, 1, 5, 2)) {
+ 0x80000000, 1, 1000, 2)) {
CH_ERR(adap, "MAC %d Rx fifo drain failed\n",
macidx(mac));
return -1;
@@ -191,11 +206,21 @@ static int t3b2_mac_reset(struct cmac *mac)
F_DISPAUSEFRAMES | F_EN1536BFRAMES |
F_RMFCS | F_ENJUMBO | F_ENHASHMCAST);
- if (!macidx(mac))
+ /* Restore the DROP_CFG */
+ t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
+ t3_write_reg(adap, A_TP_PIO_DATA, store);
+
+ if (!idx)
t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE);
else
t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE);
+ /* re-enable nic traffic */
+ t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1);
+
+ /* Set: re-enable NIC traffic */
+ t3_set_reg_field(adap, A_MPS_CFG, F_ENFORCEPKT, 1);
+
return 0;
}
@@ -236,7 +261,7 @@ int t3_mac_set_num_ucast(struct cmac *mac, int n)
return 0;
}
-static void disable_exact_filters(struct cmac *mac)
+void t3_mac_disable_exact_filters(struct cmac *mac)
{
unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_LOW_1;
@@ -247,7 +272,7 @@ static void disable_exact_filters(struct cmac *mac)
t3_read_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1); /* flush */
}
-static void enable_exact_filters(struct cmac *mac)
+void t3_mac_enable_exact_filters(struct cmac *mac)
{
unsigned int i, reg = mac->offset + A_XGM_RX_EXACT_MATCH_HIGH_1;
@@ -332,18 +357,9 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
return -EINVAL;
t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
- /*
- * Adjust the PAUSE frame watermarks. We always set the LWM, and the
- * HWM only if flow-control is enabled.
- */
- hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu,
- MAC_RXFIFO_SIZE * 38 / 100);
- hwm = min(hwm, MAC_RXFIFO_SIZE - 8192);
- lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4);
-
if (adap->params.rev >= T3_REV_B2 &&
(t3_read_reg(adap, A_XGM_RX_CTRL + mac->offset) & F_RXEN)) {
- disable_exact_filters(mac);
+ t3_mac_disable_exact_filters(mac);
v = t3_read_reg(adap, A_XGM_RX_CFG + mac->offset);
t3_set_reg_field(adap, A_XGM_RX_CFG + mac->offset,
F_ENHASHMCAST | F_COPYALLFRAMES, F_DISBCAST);
@@ -355,14 +371,14 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu)
if (t3_wait_op_done(adap, reg + mac->offset,
F_RXFIFO_EMPTY, 1, 20, 5)) {
t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
- enable_exact_filters(mac);
+ t3_mac_enable_exact_filters(mac);
return -EIO;
}
t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
V_RXMAXPKTSIZE(M_RXMAXPKTSIZE),
V_RXMAXPKTSIZE(mtu));
t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
- enable_exact_filters(mac);
+ t3_mac_enable_exact_filters(mac);
} else
t3_set_reg_field(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset,
V_RXMAXPKTSIZE(M_RXMAXPKTSIZE),
@@ -452,9 +468,12 @@ int t3_mac_enable(struct cmac *mac, int which)
if (which & MAC_DIRECTION_TX) {
t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
- t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401);
+ t3_write_reg(adap, A_TP_PIO_DATA,
+ adap->params.rev == T3_REV_C ?
+ 0xc4ffff01 : 0xc0ede401);
t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE);
- t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx);
+ t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx,
+ adap->params.rev == T3_REV_C ? 0 : 1 << idx);
t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
@@ -510,15 +529,12 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
struct adapter *adap = mac->adapter;
struct mac_stats *s = &mac->stats;
unsigned int tx_tcnt, tx_xcnt;
- unsigned int tx_mcnt = s->tx_frames;
- unsigned int rx_mcnt = s->rx_frames;
- unsigned int rx_xcnt;
+ u64 tx_mcnt = s->tx_frames;
int status;
status = 0;
tx_xcnt = 1; /* By default tx_xcnt is making progress */
tx_tcnt = mac->tx_tcnt; /* If tx_mcnt is progressing ignore tx_tcnt */
- rx_xcnt = 1; /* By default rx_xcnt is making progress */
if (tx_mcnt == mac->tx_mcnt && mac->rx_pause == s->rx_pause) {
tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
A_XGM_TX_SPI4_SOP_EOP_CNT +
@@ -529,11 +545,11 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
A_TP_PIO_DATA)));
} else {
- goto rxcheck;
+ goto out;
}
} else {
mac->toggle_cnt = 0;
- goto rxcheck;
+ goto out;
}
if ((tx_tcnt != mac->tx_tcnt) && (mac->tx_xcnt == 0)) {
@@ -546,23 +562,6 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
}
} else {
mac->toggle_cnt = 0;
- goto rxcheck;
- }
-
-rxcheck:
- if (rx_mcnt != mac->rx_mcnt) {
- rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
- A_XGM_RX_SPI4_SOP_EOP_CNT +
- mac->offset))) +
- (s->rx_fifo_ovfl -
- mac->rx_ocnt);
- mac->rx_ocnt = s->rx_fifo_ovfl;
- } else
- goto out;
-
- if (mac->rx_mcnt != s->rx_frames && rx_xcnt == 0 &&
- mac->rx_xcnt == 0) {
- status = 2;
goto out;
}
@@ -570,8 +569,6 @@ out:
mac->tx_tcnt = tx_tcnt;
mac->tx_xcnt = tx_xcnt;
mac->tx_mcnt = s->tx_frames;
- mac->rx_xcnt = rx_xcnt;
- mac->rx_mcnt = s->rx_frames;
mac->rx_pause = s->rx_pause;
if (status == 1) {
t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
distrib
>
Scientific%20Linux
>
5x
>
x86_64
>
by-pkgid
>
27922b4260f65d317aabda37e42bbbff
>
files
>
2549
